From: Jonathan Bakker <xc-racer2@live.ca>
To: Paul Cercueil <paul@crapouillou.net>,
"H. Nikolaus Schaller" <hns@goldelico.com>
Cc: "Mark Rutland" <mark.rutland@arm.com>,
"David Airlie" <airlied@linux.ie>,
"James Hogan" <jhogan@kernel.org>,
dri-devel@lists.freedesktop.org, linux-mips@vger.kernel.org,
linux-samsung-soc@vger.kernel.org, letux-kernel@openphoenux.org,
"Paul Burton" <paulburton@kernel.org>,
"Krzysztof Kozlowski" <krzk@kernel.org>,
"Tony Lindgren" <tony@atomide.com>,
"Chen-Yu Tsai" <wens@csie.org>, "Kukjin Kim" <kgene@kernel.org>,
devicetree@vger.kernel.org,
"Benoît Cousson" <bcousson@baylibre.com>,
"Rob Herring" <robh+dt@kernel.org>,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
"Thomas Bogendoerfer" <tsbogend@alpha.franken.de>,
"Philipp Rossak" <embed3d@gmail.com>,
openpvrsgx-devgroup@letux.org, linux-kernel@vger.kernel.org,
"Ralf Baechle" <ralf@linux-mips.org>,
kernel@pyra-handheld.com
Subject: Re: [PATCH v7 08/12] arm: dts: s5pv210: Add node for SGX 540
Date: Sun, 26 Apr 2020 07:57:12 -0700 [thread overview]
Message-ID: <BN6PR04MB0660A180D2069848E5C03D7EA3AE0@BN6PR04MB0660.namprd04.prod.outlook.com> (raw)
In-Reply-To: <NYBE9Q.YH08US7A7DC3@crapouillou.net>
Hi Paul,
On 2020-04-26 5:56 a.m., Paul Cercueil wrote:
>
>
> Le ven. 24 avril 2020 à 22:34, H. Nikolaus Schaller <hns@goldelico.com> a écrit :
>> From: Jonathan Bakker <xc-racer2@live.ca>
>>
>> All s5pv210 devices have a PowerVR SGX 540 (revision 120) attached.
>>
>> There is no external regulator for it so it can be enabled by default.
>>
>> Signed-off-by: Jonathan Bakker <xc-racer2@live.ca>
>> Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
>> ---
>> arch/arm/boot/dts/s5pv210.dtsi | 13 +++++++++++++
>> 1 file changed, 13 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/s5pv210.dtsi b/arch/arm/boot/dts/s5pv210.dtsi
>> index 2ad642f51fd9..abbdda205c1b 100644
>> --- a/arch/arm/boot/dts/s5pv210.dtsi
>> +++ b/arch/arm/boot/dts/s5pv210.dtsi
>> @@ -512,6 +512,19 @@ vic3: interrupt-controller@f2300000 {
>> #interrupt-cells = <1>;
>> };
>>
>> + gpu: gpu@f3000000 {
>> + compatible = "samsung,s5pv210-sgx540-120";
>> + reg = <0xf3000000 0x10000>;
>> + interrupt-parent = <&vic2>;
>> + interrupts = <10>;
>> + clock-names = "core";
>> + clocks = <&clocks CLK_G3D>;
>> +
>> + assigned-clocks = <&clocks MOUT_G3D>, <&clocks DOUT_G3D>;
>> + assigned-clock-rates = <0>, <66700000>;
>> + assigned-clock-parents = <&clocks MOUT_MPLL>;
>
> What are these clocks for, and why are they reparented / reclocked?
>
> Shouldn't they be passed to 'clocks' as well?
>
> -Paul
>
The G3D clock system can have multiple parents, and for stable operation
it's recommended to use the MPLL clock as the parent (which in turn
is actually a mux as well). MOUT_G3D is simply the mux for CLK_G3D
(SGX core clock), DOUT_G3D is the divider. DOUT_G3D could equally be CLK_G3D
(and probably should be, for readability) as CLK_G3D is simply the gate and
DOUT_G3D is the divider for it.
The SGX clock layout on S5PV210 looks something like this:
MOUT_MPLL -----------> MOUT_G3D ---> DOUT_G3D ---> CLK_G3D
(selectable parent clock) (mux) ---> (divider) ---> (gate)
This is fairly common for older Samsung SoCs, eg having a look at
arch/arm/boot/dts/exynos4210-universal_c210.dts you can see that
the FIMC clocks are parented to MPLL and have a rate set.
>> + };
>> +
>> fimd: fimd@f8000000 {
>> compatible = "samsung,s5pv210-fimd";
>> interrupt-parent = <&vic2>;
>> --
>> 2.25.1
>>
>
>
Thanks,
Jonathan
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next prev parent reply other threads:[~2020-04-27 7:22 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-24 20:34 [PATCH v7 00/12] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml for Imagination GPUs H. Nikolaus Schaller
2020-04-24 20:43 ` H. Nikolaus Schaller
2020-04-26 13:11 ` Paul Cercueil
2020-05-02 20:26 ` H. Nikolaus Schaller
2020-05-03 12:52 ` Paul Cercueil
2020-05-03 13:31 ` H. Nikolaus Schaller
2020-05-03 14:18 ` Paul Cercueil
2020-05-03 15:01 ` [PATCH v7 01/12] dt-bindings: add img,pvrsgx.yaml " Tony Lindgren
2020-05-15 7:58 ` [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml " H. Nikolaus Schaller
2020-05-03 16:41 ` H. Nikolaus Schaller
2020-05-15 7:18 ` H. Nikolaus Schaller
2020-04-26 19:36 ` Philipp Rossak
2020-04-26 20:59 ` H. Nikolaus Schaller
2020-05-05 15:53 ` [PATCH v7 01/12] dt-bindings: add img,pvrsgx.yaml " Rob Herring
2020-05-15 7:59 ` [PATCH v7 01/12] dt-bindings: add img, pvrsgx.yaml " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 02/12] ARM: DTS: am33xx: add sgx gpu child node H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 03/12] ARM: DTS: am3517: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 04/12] ARM: DTS: omap34xx: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 05/12] ARM: DTS: omap36xx: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 06/12] ARM: DTS: omap4: " H. Nikolaus Schaller
2020-04-26 12:50 ` Paul Cercueil
2020-04-28 7:59 ` H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 07/12] ARM: DTS: omap5: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 08/12] arm: dts: s5pv210: Add node for SGX 540 H. Nikolaus Schaller
2020-04-26 12:56 ` Paul Cercueil
2020-04-26 14:57 ` Jonathan Bakker [this message]
2020-04-27 15:46 ` Krzysztof Kozlowski
2020-04-28 21:39 ` Jonathan Bakker
2020-04-28 22:58 ` Jonathan Bakker
2020-04-29 8:47 ` Maxime Ripard
2020-04-29 12:26 ` Paul Cercueil
2020-04-24 20:34 ` [PATCH v7 09/12] ARM: dts: sun6i: a31: add sgx gpu child node H. Nikolaus Schaller
2020-04-26 12:53 ` Paul Cercueil
2020-04-26 19:31 ` Philipp Rossak
2020-04-24 20:34 ` [PATCH v7 10/12] ARM: dts: sun6i: a31s: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 11/12] ARM: dts: sun8i: a83t: " H. Nikolaus Schaller
2020-04-24 20:34 ` [PATCH v7 12/12] MIPS: DTS: jz4780: add sgx gpu node H. Nikolaus Schaller
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