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[209.85.210.42]) by smtp.gmail.com with ESMTPSA id 4sm162163ota.48.2021.09.27.11.43.27 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 27 Sep 2021 11:43:28 -0700 (PDT) Received: by mail-ot1-f42.google.com with SMTP id x33-20020a9d37a4000000b0054733a85462so25690582otb.10 for ; Mon, 27 Sep 2021 11:43:27 -0700 (PDT) X-Received: by 2002:a05:6830:112:: with SMTP id i18mr1353439otp.186.1632768207428; Mon, 27 Sep 2021 11:43:27 -0700 (PDT) MIME-Version: 1.0 References: <20210924162321.1.Ic2904d37f30013a7f3d8476203ad3733c186827e@changeid> In-Reply-To: From: Brian Norris Date: Mon, 27 Sep 2021 11:43:16 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 1/2] drm/rockchip: dsi: hold pm-runtime across bind/unbind To: Chen-Yu Tsai Cc: =?UTF-8?Q?Heiko_St=C3=BCbner?= , dri-devel , LKML , Sandy Huang , "open list:ARM/Rockchip SoC..." , Thomas Hebb , aleksandr.o.makarov@gmail.com, stable Content-Type: text/plain; charset="UTF-8" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Mon, Sep 27, 2021 at 12:10 AM Chen-Yu Tsai wrote: > On Sat, Sep 25, 2021 at 7:24 AM Brian Norris wrote: > > We should match the runtime PM to the lifetime of the bind()/unbind() > > cycle. > > I'm not too familiar with MIPI DSI, but it seems that the subsystem expects > the DSI link to be always available, and in LPM if power saving is required? > If so then this change matches that expectation, though we might lose some > power savings compared to the previous non-conforming behavior. Yeah, I was a little torn on whether we should care about any possible lost power savings here, because now we stay runtime-enabled even if the display is not enable()d. But I'm not aware of a good hook for handling this kind of a sequence, and I'm not convinced there is much savings by disabling the power domain in that case. > > Fixes: 59eb7193bef2 ("drm/rockchip: dsi: move all lane config except LCDC mux to bind()") > > This hash is from some stable branch. The mainline one is: > > 43c2de1002d2 drm/rockchip: dsi: move all lane config except LCDC mux to bind() Oops, good catch. I've been doing too much debugging/development on 5.10.y stable. Fixed in v2. > The bind function is missing an error cleanup path. We might end up with > unbalanced runtime PM references. (And also possibly an enabled pllref clk.) > This is a pre-existing issue though. The code changes here look correct. In v2, I've performed cleanup for the runtime PM state in this patch, and added an additional patch to fix the other existing issues you noted. Thanks. Brian