From mboxrd@z Thu Jan 1 00:00:00 1970 From: Karol Herbst Subject: Re: [PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges Date: Thu, 14 Nov 2019 20:17:30 +0100 Message-ID: References: <20191017121901.13699-1-kherbst@redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Return-path: In-Reply-To: <20191017121901.13699-1-kherbst@redhat.com> Sender: linux-kernel-owner@vger.kernel.org To: LKML Cc: Bjorn Helgaas , Lyude Paul , "Rafael J . Wysocki" , Mika Westerberg , Linux PCI , Linux PM , dri-devel , nouveau List-Id: dri-devel@lists.freedesktop.org ping on the patch. I wasn't able to verify this issue on any other bridge controller, so it really might be only this one. On Thu, Oct 17, 2019 at 2:19 PM Karol Herbst wrote: > > Fixes state transitions of Nvidia Pascal GPUs from D3cold into higher dev= ice > states. > > v2: convert to pci_dev quirk > put a proper technical explanation of the issue as a in-code comment > v3: disable it only for certain combinations of intel and nvidia hardware > v4: simplify quirk by setting flag on the GPU itself > > Signed-off-by: Karol Herbst > Cc: Bjorn Helgaas > Cc: Lyude Paul > Cc: Rafael J. Wysocki > Cc: Mika Westerberg > Cc: linux-pci@vger.kernel.org > Cc: linux-pm@vger.kernel.org > Cc: dri-devel@lists.freedesktop.org > Cc: nouveau@lists.freedesktop.org > --- > drivers/pci/pci.c | 7 ++++++ > drivers/pci/quirks.c | 53 ++++++++++++++++++++++++++++++++++++++++++++ > include/linux/pci.h | 1 + > 3 files changed, 61 insertions(+) > > diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c > index b97d9e10c9cc..02e71e0bcdd7 100644 > --- a/drivers/pci/pci.c > +++ b/drivers/pci/pci.c > @@ -850,6 +850,13 @@ static int pci_raw_set_power_state(struct pci_dev *d= ev, pci_power_t state) > || (state =3D=3D PCI_D2 && !dev->d2_support)) > return -EIO; > > + /* > + * check if we have a bad combination of bridge controller and nv= idia > + * GPU, see quirk_broken_nv_runpm for more info > + */ > + if (state !=3D PCI_D0 && dev->broken_nv_runpm) > + return 0; > + > pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr); > > /* > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index 44c4ae1abd00..0006c9e37b6f 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -5268,3 +5268,56 @@ static void quirk_reset_lenovo_thinkpad_p50_nvgpu(= struct pci_dev *pdev) > DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, 0x13b1, > PCI_CLASS_DISPLAY_VGA, 8, > quirk_reset_lenovo_thinkpad_p50_nvgpu); > + > +/* > + * Some Intel PCIe bridges cause devices to disappear from the PCIe bus = after > + * those were put into D3cold state if they were put into a non D0 PCI P= M > + * device state before doing so. > + * > + * This leads to various issue different issues which all manifest diffe= rently, > + * but have the same root cause: > + * - AIML code execution hits an infinite loop (as the coe waits on dev= ice > + * memory to change). > + * - kernel crashes, as all pci reads return -1, which most code isn't = able > + * to handle well enough. > + * - sudden shutdowns, as the kernel identified an unrecoverable error = after > + * userspace tries to access the GPU. > + * > + * In all cases dmesg will contain at least one line like this: > + * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3= ' > + * followed by a lot of nouveau timeouts. > + * > + * ACPI code writes bit 0x80 to the not documented PCI register 0x248 of= the > + * PCIe bridge controller in order to power down the GPU. > + * Nonetheless, there are other code paths inside the ACPI firmware whic= h use > + * other registers, which seem to work fine: > + * - 0xbc bit 0x20 (publicly available documentation claims 'reserved') > + * - 0xb0 bit 0x10 (link disable) > + * Changing the conditions inside the firmware by poking into the releva= nt > + * addresses does resolve the issue, but it seemed to be ACPI private me= mory > + * and not any device accessible memory at all, so there is no portable = way of > + * changing the conditions. > + * > + * The only systems where this behavior can be seen are hybrid graphics = laptops > + * with a secondary Nvidia Pascal GPU. It cannot be ruled out that this = issue > + * only occurs in combination with listed Intel PCIe bridge controllers = and > + * the mentioned GPUs or if it's only a hw bug in the bridge controller. > + * > + * But because this issue was NOT seen on laptops with an Nvidia Pascal = GPU > + * and an Intel Coffee Lake SoC, there is a higher chance of there being= a bug > + * in the bridge controller rather than in the GPU. > + * > + * This issue was not able to be reproduced on non laptop systems. > + */ > + > +static void quirk_broken_nv_runpm(struct pci_dev *dev) > +{ > + struct pci_dev *bridge =3D pci_upstream_bridge(dev); > + > + if (bridge->vendor =3D=3D PCI_VENDOR_ID_INTEL && > + bridge->device =3D=3D 0x1901) > + dev->broken_nv_runpm =3D 1; > +} > +DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, > + PCI_BASE_CLASS_DISPLAY, 16, > + quirk_broken_nv_runpm); > diff --git a/include/linux/pci.h b/include/linux/pci.h > index ac8a6c4e1792..903a0b3a39ec 100644 > --- a/include/linux/pci.h > +++ b/include/linux/pci.h > @@ -416,6 +416,7 @@ struct pci_dev { > unsigned int __aer_firmware_first_valid:1; > unsigned int __aer_firmware_first:1; > unsigned int broken_intx_masking:1; /* INTx masking can't be = used */ > + unsigned int broken_nv_runpm:1; /* some combinations of i= ntel bridge controller and nvidia GPUs break rtd3 */ > unsigned int io_window_1k:1; /* Intel bridge 1K I/O wi= ndows */ > unsigned int irq_managed:1; > unsigned int has_secondary_link:1; > -- > 2.21.0 > From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 20E07C432C3 for ; Thu, 14 Nov 2019 19:17:49 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0095A20718 for ; Thu, 14 Nov 2019 19:17:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0095A20718 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5EBAE6E096; Thu, 14 Nov 2019 19:17:48 +0000 (UTC) Received: from us-smtp-delivery-1.mimecast.com (us-smtp-2.mimecast.com [205.139.110.61]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1C2B76E087 for ; Thu, 14 Nov 2019 19:17:47 +0000 (UTC) Received: from mail-qv1-f70.google.com (mail-qv1-f70.google.com [209.85.219.70]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-222-b-jGD8IvP9mOHiF72-5RfQ-1; Thu, 14 Nov 2019 14:17:44 -0500 Received: by mail-qv1-f70.google.com with SMTP id n10so4776507qvr.22 for ; Thu, 14 Nov 2019 11:17:43 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=yzU2orsV1IQ0b605t7GrUNqdH9lGit9QLMaD0lmIB5c=; b=nJ/AEwO/5/2N/PMgMcx9999xxTuci/0sDMp4IDVhzBuXP1yXrcn7fSQILSS/vVix49 0QBCj+wjt0xZuCWZow8jqF+JKJGJPm0rz06OjCNXoILtw72mnKih4b2P690u4RBpagfr Y6MdrjkQsbDaJJph5PdzLYNMdX8lHDIlEzqtdJKKNrXkVcUZMsjLvMyQTbm3/e9Ff1f/ aMD6R3B0FSP/CTSl/03vnnI2hvgXT+/8kLEJqf7LmI3Wz9cCzFbZzgiXzzU6EgO3D1F0 +cDuPmelvFgyBlwx4qd53CUubo8o99TT/UTfrY++/n3mRAH6xh47ihWQipO+Y56Jw4gd nZkg== X-Gm-Message-State: APjAAAUz/HY2qw+vo+IxiZ70a1hCrZ/1S+RSuBszYRXJXX4teddrm4Hq trBxe61b9Xlz7LEl2+KRscf/VCQxCI2LB9DLePlHVCWtajUBRp6Bp2FJjzn+uEzAfKRdeiC6bky bIFQPNiU2gYCxNW7JrQCXnILEQ4KN09J4YIvfykP2S5JY X-Received: by 2002:ac8:75ce:: with SMTP id z14mr9911917qtq.130.1573759062341; Thu, 14 Nov 2019 11:17:42 -0800 (PST) X-Google-Smtp-Source: APXvYqyBzlpxS0u5QYAn3+7xHyAlZnhB1xo77FSDY0Sd/oCUw4ff3cxInd+1N0Ly/+l1puO3E0enij5HXFW6Mn/Bh7c= X-Received: by 2002:ac8:75ce:: with SMTP id z14mr9911890qtq.130.1573759062129; Thu, 14 Nov 2019 11:17:42 -0800 (PST) MIME-Version: 1.0 References: <20191017121901.13699-1-kherbst@redhat.com> In-Reply-To: <20191017121901.13699-1-kherbst@redhat.com> From: Karol Herbst Date: Thu, 14 Nov 2019 20:17:30 +0100 Message-ID: Subject: Re: [PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges To: LKML X-MC-Unique: b-jGD8IvP9mOHiF72-5RfQ-1 X-Mimecast-Spam-Score: 0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1573759065; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=iO7IjIFxA01AP12H/14msCUb1F6tFNp4BMry0uJ072A=; b=HRypMVOjexCJwVILTCJwj8G1ru7R+Q2La/eG+ix+Cmi5Gbd3hJOE3EH0azpFirJfKq1FjF 6uDzvHrf8tyi5+u1S/43TQH4FuMTdfQ6PBqutrTygNoiF2FMWTHjL21aBDF2fsSP/slsn0 Eb3yici3jQ1yjLkW91EcD/ul+XhCCuE= X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Linux PM , Linux PCI , Mika Westerberg , "Rafael J . Wysocki" , dri-devel , nouveau , Bjorn Helgaas Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Message-ID: <20191114191730.ITVFLQ4t3lkQrp3qgO3tmaYt6k84gSDq4YL_1C1_ehk@z> cGluZyBvbiB0aGUgcGF0Y2guCgpJIHdhc24ndCBhYmxlIHRvIHZlcmlmeSB0aGlzIGlzc3VlIG9u IGFueSBvdGhlciBicmlkZ2UgY29udHJvbGxlciwgc28KaXQgcmVhbGx5IG1pZ2h0IGJlIG9ubHkg dGhpcyBvbmUuCgpPbiBUaHUsIE9jdCAxNywgMjAxOSBhdCAyOjE5IFBNIEthcm9sIEhlcmJzdCA8 a2hlcmJzdEByZWRoYXQuY29tPiB3cm90ZToKPgo+IEZpeGVzIHN0YXRlIHRyYW5zaXRpb25zIG9m IE52aWRpYSBQYXNjYWwgR1BVcyBmcm9tIEQzY29sZCBpbnRvIGhpZ2hlciBkZXZpY2UKPiBzdGF0 ZXMuCj4KPiB2MjogY29udmVydCB0byBwY2lfZGV2IHF1aXJrCj4gICAgIHB1dCBhIHByb3BlciB0 ZWNobmljYWwgZXhwbGFuYXRpb24gb2YgdGhlIGlzc3VlIGFzIGEgaW4tY29kZSBjb21tZW50Cj4g djM6IGRpc2FibGUgaXQgb25seSBmb3IgY2VydGFpbiBjb21iaW5hdGlvbnMgb2YgaW50ZWwgYW5k IG52aWRpYSBoYXJkd2FyZQo+IHY0OiBzaW1wbGlmeSBxdWlyayBieSBzZXR0aW5nIGZsYWcgb24g dGhlIEdQVSBpdHNlbGYKPgo+IFNpZ25lZC1vZmYtYnk6IEthcm9sIEhlcmJzdCA8a2hlcmJzdEBy ZWRoYXQuY29tPgo+IENjOiBCam9ybiBIZWxnYWFzIDxiaGVsZ2Fhc0Bnb29nbGUuY29tPgo+IENj OiBMeXVkZSBQYXVsIDxseXVkZUByZWRoYXQuY29tPgo+IENjOiBSYWZhZWwgSi4gV3lzb2NraSA8 cmp3QHJqd3lzb2NraS5uZXQ+Cj4gQ2M6IE1pa2EgV2VzdGVyYmVyZyA8bWlrYS53ZXN0ZXJiZXJn QGludGVsLmNvbT4KPiBDYzogbGludXgtcGNpQHZnZXIua2VybmVsLm9yZwo+IENjOiBsaW51eC1w bUB2Z2VyLmtlcm5lbC5vcmcKPiBDYzogZHJpLWRldmVsQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwo+ IENjOiBub3V2ZWF1QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwo+IC0tLQo+ICBkcml2ZXJzL3BjaS9w Y2kuYyAgICB8ICA3ICsrKysrKwo+ICBkcml2ZXJzL3BjaS9xdWlya3MuYyB8IDUzICsrKysrKysr KysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrKysrCj4gIGluY2x1ZGUvbGludXgvcGNp LmggIHwgIDEgKwo+ICAzIGZpbGVzIGNoYW5nZWQsIDYxIGluc2VydGlvbnMoKykKPgo+IGRpZmYg LS1naXQgYS9kcml2ZXJzL3BjaS9wY2kuYyBiL2RyaXZlcnMvcGNpL3BjaS5jCj4gaW5kZXggYjk3 ZDllMTBjOWNjLi4wMmU3MWUwYmNkZDcgMTAwNjQ0Cj4gLS0tIGEvZHJpdmVycy9wY2kvcGNpLmMK PiArKysgYi9kcml2ZXJzL3BjaS9wY2kuYwo+IEBAIC04NTAsNiArODUwLDEzIEBAIHN0YXRpYyBp bnQgcGNpX3Jhd19zZXRfcG93ZXJfc3RhdGUoc3RydWN0IHBjaV9kZXYgKmRldiwgcGNpX3Bvd2Vy X3Qgc3RhdGUpCj4gICAgICAgICAgICB8fCAoc3RhdGUgPT0gUENJX0QyICYmICFkZXYtPmQyX3N1 cHBvcnQpKQo+ICAgICAgICAgICAgICAgICByZXR1cm4gLUVJTzsKPgo+ICsgICAgICAgLyoKPiAr ICAgICAgICAqIGNoZWNrIGlmIHdlIGhhdmUgYSBiYWQgY29tYmluYXRpb24gb2YgYnJpZGdlIGNv bnRyb2xsZXIgYW5kIG52aWRpYQo+ICsgICAgICAgICAqIEdQVSwgc2VlIHF1aXJrX2Jyb2tlbl9u dl9ydW5wbSBmb3IgbW9yZSBpbmZvCj4gKyAgICAgICAgKi8KPiArICAgICAgIGlmIChzdGF0ZSAh PSBQQ0lfRDAgJiYgZGV2LT5icm9rZW5fbnZfcnVucG0pCj4gKyAgICAgICAgICAgICAgIHJldHVy biAwOwo+ICsKPiAgICAgICAgIHBjaV9yZWFkX2NvbmZpZ193b3JkKGRldiwgZGV2LT5wbV9jYXAg KyBQQ0lfUE1fQ1RSTCwgJnBtY3NyKTsKPgo+ICAgICAgICAgLyoKPiBkaWZmIC0tZ2l0IGEvZHJp dmVycy9wY2kvcXVpcmtzLmMgYi9kcml2ZXJzL3BjaS9xdWlya3MuYwo+IGluZGV4IDQ0YzRhZTFh YmQwMC4uMDAwNmM5ZTM3YjZmIDEwMDY0NAo+IC0tLSBhL2RyaXZlcnMvcGNpL3F1aXJrcy5jCj4g KysrIGIvZHJpdmVycy9wY2kvcXVpcmtzLmMKPiBAQCAtNTI2OCwzICs1MjY4LDU2IEBAIHN0YXRp YyB2b2lkIHF1aXJrX3Jlc2V0X2xlbm92b190aGlua3BhZF9wNTBfbnZncHUoc3RydWN0IHBjaV9k ZXYgKnBkZXYpCj4gIERFQ0xBUkVfUENJX0ZJWFVQX0NMQVNTX0ZJTkFMKFBDSV9WRU5ET1JfSURf TlZJRElBLCAweDEzYjEsCj4gICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgUENJX0NMQVNT X0RJU1BMQVlfVkdBLCA4LAo+ICAgICAgICAgICAgICAgICAgICAgICAgICAgICAgIHF1aXJrX3Jl c2V0X2xlbm92b190aGlua3BhZF9wNTBfbnZncHUpOwo+ICsKPiArLyoKPiArICogU29tZSBJbnRl bCBQQ0llIGJyaWRnZXMgY2F1c2UgZGV2aWNlcyB0byBkaXNhcHBlYXIgZnJvbSB0aGUgUENJZSBi dXMgYWZ0ZXIKPiArICogdGhvc2Ugd2VyZSBwdXQgaW50byBEM2NvbGQgc3RhdGUgaWYgdGhleSB3 ZXJlIHB1dCBpbnRvIGEgbm9uIEQwIFBDSSBQTQo+ICsgKiBkZXZpY2Ugc3RhdGUgYmVmb3JlIGRv aW5nIHNvLgo+ICsgKgo+ICsgKiBUaGlzIGxlYWRzIHRvIHZhcmlvdXMgaXNzdWUgZGlmZmVyZW50 IGlzc3VlcyB3aGljaCBhbGwgbWFuaWZlc3QgZGlmZmVyZW50bHksCj4gKyAqIGJ1dCBoYXZlIHRo ZSBzYW1lIHJvb3QgY2F1c2U6Cj4gKyAqICAtIEFJTUwgY29kZSBleGVjdXRpb24gaGl0cyBhbiBp bmZpbml0ZSBsb29wIChhcyB0aGUgY29lIHdhaXRzIG9uIGRldmljZQo+ICsgKiAgICBtZW1vcnkg dG8gY2hhbmdlKS4KPiArICogIC0ga2VybmVsIGNyYXNoZXMsIGFzIGFsbCBwY2kgcmVhZHMgcmV0 dXJuIC0xLCB3aGljaCBtb3N0IGNvZGUgaXNuJ3QgYWJsZQo+ICsgKiAgICB0byBoYW5kbGUgd2Vs bCBlbm91Z2guCj4gKyAqICAtIHN1ZGRlbiBzaHV0ZG93bnMsIGFzIHRoZSBrZXJuZWwgaWRlbnRp ZmllZCBhbiB1bnJlY292ZXJhYmxlIGVycm9yIGFmdGVyCj4gKyAqICAgIHVzZXJzcGFjZSB0cmll cyB0byBhY2Nlc3MgdGhlIEdQVS4KPiArICoKPiArICogSW4gYWxsIGNhc2VzIGRtZXNnIHdpbGwg Y29udGFpbiBhdCBsZWFzdCBvbmUgbGluZSBsaWtlIHRoaXM6Cj4gKyAqICdub3V2ZWF1IDAwMDA6 MDE6MDAuMDogUmVmdXNlZCB0byBjaGFuZ2UgcG93ZXIgc3RhdGUsIGN1cnJlbnRseSBpbiBEMycK PiArICogZm9sbG93ZWQgYnkgYSBsb3Qgb2Ygbm91dmVhdSB0aW1lb3V0cy4KPiArICoKPiArICog QUNQSSBjb2RlIHdyaXRlcyBiaXQgMHg4MCB0byB0aGUgbm90IGRvY3VtZW50ZWQgUENJIHJlZ2lz dGVyIDB4MjQ4IG9mIHRoZQo+ICsgKiBQQ0llIGJyaWRnZSBjb250cm9sbGVyIGluIG9yZGVyIHRv IHBvd2VyIGRvd24gdGhlIEdQVS4KPiArICogTm9uZXRoZWxlc3MsIHRoZXJlIGFyZSBvdGhlciBj b2RlIHBhdGhzIGluc2lkZSB0aGUgQUNQSSBmaXJtd2FyZSB3aGljaCB1c2UKPiArICogb3RoZXIg cmVnaXN0ZXJzLCB3aGljaCBzZWVtIHRvIHdvcmsgZmluZToKPiArICogIC0gMHhiYyBiaXQgMHgy MCAocHVibGljbHkgYXZhaWxhYmxlIGRvY3VtZW50YXRpb24gY2xhaW1zICdyZXNlcnZlZCcpCj4g KyAqICAtIDB4YjAgYml0IDB4MTAgKGxpbmsgZGlzYWJsZSkKPiArICogQ2hhbmdpbmcgdGhlIGNv bmRpdGlvbnMgaW5zaWRlIHRoZSBmaXJtd2FyZSBieSBwb2tpbmcgaW50byB0aGUgcmVsZXZhbnQK PiArICogYWRkcmVzc2VzIGRvZXMgcmVzb2x2ZSB0aGUgaXNzdWUsIGJ1dCBpdCBzZWVtZWQgdG8g YmUgQUNQSSBwcml2YXRlIG1lbW9yeQo+ICsgKiBhbmQgbm90IGFueSBkZXZpY2UgYWNjZXNzaWJs ZSBtZW1vcnkgYXQgYWxsLCBzbyB0aGVyZSBpcyBubyBwb3J0YWJsZSB3YXkgb2YKPiArICogY2hh bmdpbmcgdGhlIGNvbmRpdGlvbnMuCj4gKyAqCj4gKyAqIFRoZSBvbmx5IHN5c3RlbXMgd2hlcmUg dGhpcyBiZWhhdmlvciBjYW4gYmUgc2VlbiBhcmUgaHlicmlkIGdyYXBoaWNzIGxhcHRvcHMKPiAr ICogd2l0aCBhIHNlY29uZGFyeSBOdmlkaWEgUGFzY2FsIEdQVS4gSXQgY2Fubm90IGJlIHJ1bGVk IG91dCB0aGF0IHRoaXMgaXNzdWUKPiArICogb25seSBvY2N1cnMgaW4gY29tYmluYXRpb24gd2l0 aCBsaXN0ZWQgSW50ZWwgUENJZSBicmlkZ2UgY29udHJvbGxlcnMgYW5kCj4gKyAqIHRoZSBtZW50 aW9uZWQgR1BVcyBvciBpZiBpdCdzIG9ubHkgYSBodyBidWcgaW4gdGhlIGJyaWRnZSBjb250cm9s bGVyLgo+ICsgKgo+ICsgKiBCdXQgYmVjYXVzZSB0aGlzIGlzc3VlIHdhcyBOT1Qgc2VlbiBvbiBs YXB0b3BzIHdpdGggYW4gTnZpZGlhIFBhc2NhbCBHUFUKPiArICogYW5kIGFuIEludGVsIENvZmZl ZSBMYWtlIFNvQywgdGhlcmUgaXMgYSBoaWdoZXIgY2hhbmNlIG9mIHRoZXJlIGJlaW5nIGEgYnVn Cj4gKyAqIGluIHRoZSBicmlkZ2UgY29udHJvbGxlciByYXRoZXIgdGhhbiBpbiB0aGUgR1BVLgo+ ICsgKgo+ICsgKiBUaGlzIGlzc3VlIHdhcyBub3QgYWJsZSB0byBiZSByZXByb2R1Y2VkIG9uIG5v biBsYXB0b3Agc3lzdGVtcy4KPiArICovCj4gKwo+ICtzdGF0aWMgdm9pZCBxdWlya19icm9rZW5f bnZfcnVucG0oc3RydWN0IHBjaV9kZXYgKmRldikKPiArewo+ICsgICAgICAgc3RydWN0IHBjaV9k ZXYgKmJyaWRnZSA9IHBjaV91cHN0cmVhbV9icmlkZ2UoZGV2KTsKPiArCj4gKyAgICAgICBpZiAo YnJpZGdlLT52ZW5kb3IgPT0gUENJX1ZFTkRPUl9JRF9JTlRFTCAmJgo+ICsgICAgICAgICAgIGJy aWRnZS0+ZGV2aWNlID09IDB4MTkwMSkKPiArICAgICAgICAgICAgICAgZGV2LT5icm9rZW5fbnZf cnVucG0gPSAxOwo+ICt9Cj4gK0RFQ0xBUkVfUENJX0ZJWFVQX0NMQVNTX0ZJTkFMKFBDSV9WRU5E T1JfSURfTlZJRElBLCBQQ0lfQU5ZX0lELAo+ICsgICAgICAgICAgICAgICAgICAgICAgICAgICAg IFBDSV9CQVNFX0NMQVNTX0RJU1BMQVksIDE2LAo+ICsgICAgICAgICAgICAgICAgICAgICAgICAg ICAgIHF1aXJrX2Jyb2tlbl9udl9ydW5wbSk7Cj4gZGlmZiAtLWdpdCBhL2luY2x1ZGUvbGludXgv cGNpLmggYi9pbmNsdWRlL2xpbnV4L3BjaS5oCj4gaW5kZXggYWM4YTZjNGUxNzkyLi45MDNhMGIz YTM5ZWMgMTAwNjQ0Cj4gLS0tIGEvaW5jbHVkZS9saW51eC9wY2kuaAo+ICsrKyBiL2luY2x1ZGUv bGludXgvcGNpLmgKPiBAQCAtNDE2LDYgKzQxNiw3IEBAIHN0cnVjdCBwY2lfZGV2IHsKPiAgICAg ICAgIHVuc2lnbmVkIGludCAgICBfX2Flcl9maXJtd2FyZV9maXJzdF92YWxpZDoxOwo+ICAgICAg ICAgdW5zaWduZWQgaW50ICAgIF9fYWVyX2Zpcm13YXJlX2ZpcnN0OjE7Cj4gICAgICAgICB1bnNp Z25lZCBpbnQgICAgYnJva2VuX2ludHhfbWFza2luZzoxOyAgLyogSU5UeCBtYXNraW5nIGNhbid0 IGJlIHVzZWQgKi8KPiArICAgICAgIHVuc2lnbmVkIGludCAgICBicm9rZW5fbnZfcnVucG06MTsg ICAgICAvKiBzb21lIGNvbWJpbmF0aW9ucyBvZiBpbnRlbCBicmlkZ2UgY29udHJvbGxlciBhbmQg bnZpZGlhIEdQVXMgYnJlYWsgcnRkMyAqLwo+ICAgICAgICAgdW5zaWduZWQgaW50ICAgIGlvX3dp bmRvd18xazoxOyAgICAgICAgIC8qIEludGVsIGJyaWRnZSAxSyBJL08gd2luZG93cyAqLwo+ICAg ICAgICAgdW5zaWduZWQgaW50ICAgIGlycV9tYW5hZ2VkOjE7Cj4gICAgICAgICB1bnNpZ25lZCBp bnQgICAgaGFzX3NlY29uZGFyeV9saW5rOjE7Cj4gLS0KPiAyLjIxLjAKPgoKX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlz dApkcmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0 b3Aub3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVs