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[209.85.217.50]) by smtp.gmail.com with ESMTPSA id 31sm2000639uac.10.2020.11.02.08.06.27 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 02 Nov 2020 08:06:27 -0800 (PST) Received: by mail-vs1-f50.google.com with SMTP id r14so2787732vsa.13 for ; Mon, 02 Nov 2020 08:06:27 -0800 (PST) X-Received: by 2002:a05:6102:309a:: with SMTP id l26mr2329294vsb.4.1604333186845; Mon, 02 Nov 2020 08:06:26 -0800 (PST) MIME-Version: 1.0 References: <20201030011738.2028313-1-swboyd@chromium.org> <20201030011738.2028313-4-swboyd@chromium.org> <20201101192027.GA7612@pendragon.ideasonboard.com> In-Reply-To: <20201101192027.GA7612@pendragon.ideasonboard.com> From: Doug Anderson Date: Mon, 2 Nov 2020 08:06:14 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 3/4] drm/bridge: ti-sn65dsi86: Read EDID blob over DDC To: Laurent Pinchart X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jernej Skrabec , Jonas Karlman , Neil Armstrong , LKML , dri-devel , Stephen Boyd , Andrzej Hajda , Sean Paul Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi, On Sun, Nov 1, 2020 at 11:21 AM Laurent Pinchart wrote: > > Hi Stephen, > > Thank you for the patch. > > On Thu, Oct 29, 2020 at 06:17:37PM -0700, Stephen Boyd wrote: > > Use the DDC connection to read the EDID from the eDP panel instead of > > relying on the panel to tell us the modes. > > > > Reviewed-by: Douglas Anderson > > Cc: Laurent Pinchart > > Cc: Jonas Karlman > > Cc: Jernej Skrabec > > Cc: Sean Paul > > Signed-off-by: Stephen Boyd > > --- > > drivers/gpu/drm/bridge/ti-sn65dsi86.c | 20 ++++++++++++++++++++ > > 1 file changed, 20 insertions(+) > > > > diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c > > index c77f46a21aae..f86934fd6cc8 100644 > > --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c > > +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c > > @@ -119,6 +119,7 @@ > > * @debugfs: Used for managing our debugfs. > > * @host_node: Remote DSI node. > > * @dsi: Our MIPI DSI source. > > + * @edid: Detected EDID of eDP panel. > > * @refclk: Our reference clock. > > * @panel: Our panel. > > * @enable_gpio: The GPIO we toggle to enable the bridge. > > @@ -144,6 +145,7 @@ struct ti_sn_bridge { > > struct drm_bridge bridge; > > struct drm_connector connector; > > struct dentry *debugfs; > > + struct edid *edid; > > struct device_node *host_node; > > struct mipi_dsi_device *dsi; > > struct clk *refclk; > > @@ -265,6 +267,23 @@ connector_to_ti_sn_bridge(struct drm_connector *connector) > > static int ti_sn_bridge_connector_get_modes(struct drm_connector *connector) > > { > > struct ti_sn_bridge *pdata = connector_to_ti_sn_bridge(connector); > > + struct edid *edid = pdata->edid; > > + int num, ret; > > + > > + if (!edid) { > > + pm_runtime_get_sync(pdata->dev); > > + edid = pdata->edid = drm_get_edid(connector, &pdata->aux.ddc); > > + pm_runtime_put(pdata->dev); > > + } > > Do we need to cache the EDID ? It seems like something that should be > done by the DRM core (well, caching modes in that case), not by > individual bridge drivers. I can take the blame for the fact that it does caching, since I requested it in early reviews. In general boot speed is pretty important to me and each read of the EDID take 20 ms. There are definitely several calls to get the EDID during a normal bootup. Stephen did a little more digging into exactly what was causing all these calls and can chime in, but in general until we can eliminate the extra calls it seems like it'd be nice to keep the caching? This bridge chip is intended for use for eDP for internal panels, so there should be no downside to caching. If we can later optimize the DRM core, we can fix this and a pre-existing driver that does the same type of caching (analogix-anx6345.c) at the same time? -Doug _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel