From: Alex Deucher <alexdeucher@gmail.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>,
Tom St Denis <tom.stdenis@amd.com>
Cc: "David Airlie" <airlied@linux.ie>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"amd-gfx@lists.freedesktop.org" <amd-gfx@lists.freedesktop.org>,
"Ruhl, Michael J" <michael.j.ruhl@intel.com>,
"Stankiewicz, Piotr" <piotr.stankiewicz@intel.com>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>
Subject: Re: [PATCH 07/15] drm/amdgpu: use PCI_IRQ_MSI_TYPES where appropriate
Date: Tue, 2 Jun 2020 10:39:47 -0400 [thread overview]
Message-ID: <CADnq5_Mcys8tF-UAZ1JrLy1HnL-Ms7TTrLBPrWkA08tuhjkB2A@mail.gmail.com> (raw)
In-Reply-To: <CAHp75Vd1zVt7F2+44EFPHOrCOzexe=mLaiZixqJR9NNK9-wNQg@mail.gmail.com>
On Tue, Jun 2, 2020 at 10:35 AM Andy Shevchenko
<andy.shevchenko@gmail.com> wrote:
>
> On Tue, Jun 2, 2020 at 5:21 PM Alex Deucher <alexdeucher@gmail.com> wrote:
> > On Tue, Jun 2, 2020 at 10:00 AM Andy Shevchenko
> > <andy.shevchenko@gmail.com> wrote:
> > > On Tue, Jun 2, 2020 at 4:38 PM Ruhl, Michael J <michael.j.ruhl@intel.com> wrote:
> > > > >From: dri-devel <dri-devel-bounces@lists.freedesktop.org> On Behalf Of
> > > > >Piotr Stankiewicz
>
> > > > > int nvec = pci_msix_vec_count(adev->pdev);
> > > > > unsigned int flags;
> > > > >
> > > > >- if (nvec <= 0) {
> > > > >+ if (nvec > 0)
> > > > >+ flags = PCI_IRQ_MSI_TYPES;
> > > > >+ else
> > > > > flags = PCI_IRQ_MSI;
> > > > >- } else {
> > > > >- flags = PCI_IRQ_MSI | PCI_IRQ_MSIX;
> > > > >- }
> > > >
> > > > Minor nit:
> > > >
> > > > Is it really necessary to set do this check? Can flags just
> > > > be set?
> > > >
> > > > I.e.:
> > > > flags = PCI_IRQ_MSI_TYPES;
> > > >
> > > > pci_alloc_irq_vector() tries stuff in order. If MSIX is not available,
> > > > it will try MSI.
> > >
> > > That's also what I proposed earlier. But I suggested as well to wait
> > > for AMD people to confirm that neither pci_msix_vec_count() nor flags
> > > is needed and we can directly supply MSI_TYPES to the below call.
> > >
> >
> > I think it was leftover from debugging and just to be careful. We had
> > some issues when we originally enabled MSI-X on certain boards. The
> > fix was to just allocate a single vector (since that is all we use
> > anyway) and we were using the wrong irq (pdev->irq vs
> > pci_irq_vector(pdev, 0)).
>
> Do you agree that simple
>
> nvec = pci_alloc_irq_vectors(adev->pdev, 1, 1, PCI_IRQ_MSI_TYPES);
>
> will work and we can remove that leftover?
Yes, I believe so. Tom, can you give this a quick spin on raven just
in case if you get a chance? Something like this:
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
index 0cc4c67f95f7..c59111b57cc2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
@@ -248,16 +248,10 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
adev->irq.msi_enabled = false;
if (amdgpu_msi_ok(adev)) {
- int nvec = pci_msix_vec_count(adev->pdev);
- unsigned int flags;
+ int nvec;
- if (nvec <= 0) {
- flags = PCI_IRQ_MSI;
- } else {
- flags = PCI_IRQ_MSI | PCI_IRQ_MSIX;
- }
/* we only need one vector */
- nvec = pci_alloc_irq_vectors(adev->pdev, 1, 1, flags);
+ nvec = pci_alloc_irq_vectors(adev->pdev, 1, 1,
PCI_IRQ_MSI | PCI_IRQ_MSIX);
if (nvec > 0) {
adev->irq.msi_enabled = true;
dev_dbg(adev->dev, "using MSI/MSI-X.\n");
Thanks,
Alex
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
prev parent reply other threads:[~2020-06-02 14:40 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-02 9:20 [PATCH 07/15] drm/amdgpu: use PCI_IRQ_MSI_TYPES where appropriate Piotr Stankiewicz
2020-06-02 9:49 ` Andy Shevchenko
2020-06-02 9:57 ` Stankiewicz, Piotr
2020-06-02 9:59 ` Andy Shevchenko
2020-06-02 13:35 ` Ruhl, Michael J
2020-06-02 14:00 ` Andy Shevchenko
2020-06-02 14:21 ` Alex Deucher
2020-06-02 14:35 ` Andy Shevchenko
2020-06-02 14:39 ` Alex Deucher [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CADnq5_Mcys8tF-UAZ1JrLy1HnL-Ms7TTrLBPrWkA08tuhjkB2A@mail.gmail.com \
--to=alexdeucher@gmail.com \
--cc=airlied@linux.ie \
--cc=alexander.deucher@amd.com \
--cc=amd-gfx@lists.freedesktop.org \
--cc=andy.shevchenko@gmail.com \
--cc=christian.koenig@amd.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=linux-kernel@vger.kernel.org \
--cc=michael.j.ruhl@intel.com \
--cc=piotr.stankiewicz@intel.com \
--cc=tom.stdenis@amd.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).