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From: Alex Deucher <alexdeucher@gmail.com>
To: Bernard Zhao <bernard@vivo.com>
Cc: opensource.kernel@vivo.com,
	"Deepak R Varma" <mh12gx2825@gmail.com>,
	"David Airlie" <airlied@linux.ie>,
	LKML <linux-kernel@vger.kernel.org>,
	"amd-gfx list" <amd-gfx@lists.freedesktop.org>,
	"Luben Tuikov" <luben.tuikov@amd.com>,
	"Maling list - DRI developers" <dri-devel@lists.freedesktop.org>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Likun Gao" <Likun.Gao@amd.com>, "Evan Quan" <evan.quan@amd.com>,
	"Christian König" <christian.koenig@amd.com>,
	"Hawking Zhang" <Hawking.Zhang@amd.com>
Subject: Re: [PATCH] amd/amdgpu: code refactoring to clean code style a bit
Date: Thu, 1 Apr 2021 17:12:02 -0400	[thread overview]
Message-ID: <CADnq5_Pc0iDmmuH5oTa0_T23EJGfhqf+zzedXL2n_QME5MrjQw@mail.gmail.com> (raw)
In-Reply-To: <20210331131143.60652-1-bernard@vivo.com>

This code has been dropped.

Alex

On Wed, Mar 31, 2021 at 9:36 AM Bernard Zhao <bernard@vivo.com> wrote:
>
> Fix checkpatch.pl warning:
> Too many leading tabs - consider code refactoring
> WARNING: Too many leading tabs - consider code refactoring
> +                                               for (j = 0; j < profile->ucLeakageBinNum; j++) {
>
> WARNING: Too many leading tabs - consider code refactoring
> +                                                       if (vbios_voltage_id <= leakage_bin[j]) {
>
> WARNING: Too many leading tabs - consider code refactoring
> +                                               for (j = 0; j < profile->ucLeakageBinNum; j++) {
>
> WARNING: Too many leading tabs - consider code refactoring
> +                                                       if (vbios_voltage_id <= leakage_bin[j]) {
>
> Signed-off-by: Bernard Zhao <bernard@vivo.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c | 84 ++++++++------------
>  1 file changed, 35 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
> index 86add0f4ea4d..9968ff8ddc9c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_atombios.c
> @@ -1283,65 +1283,51 @@ int amdgpu_atombios_get_leakage_vddc_based_on_leakage_params(struct amdgpu_devic
>         profile = (ATOM_ASIC_PROFILING_INFO_V2_1 *)
>                 (adev->mode_info.atom_context->bios + data_offset);
>
> -       switch (frev) {
> -       case 1:
> +       if ((frev != 2) || (crev != 1)) {
> +               DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
>                 return -EINVAL;
> -       case 2:
> -               switch (crev) {
> -               case 1:
> -                       if (size < sizeof(ATOM_ASIC_PROFILING_INFO_V2_1))
> -                               return -EINVAL;
> -                       leakage_bin = (u16 *)
> -                               (adev->mode_info.atom_context->bios + data_offset +
> -                                le16_to_cpu(profile->usLeakageBinArrayOffset));
> -                       vddc_id_buf = (u16 *)
> -                               (adev->mode_info.atom_context->bios + data_offset +
> -                                le16_to_cpu(profile->usElbVDDC_IdArrayOffset));
> -                       vddc_buf = (u16 *)
> -                               (adev->mode_info.atom_context->bios + data_offset +
> -                                le16_to_cpu(profile->usElbVDDC_LevelArrayOffset));
> -                       vddci_id_buf = (u16 *)
> -                               (adev->mode_info.atom_context->bios + data_offset +
> -                                le16_to_cpu(profile->usElbVDDCI_IdArrayOffset));
> -                       vddci_buf = (u16 *)
> -                               (adev->mode_info.atom_context->bios + data_offset +
> -                                le16_to_cpu(profile->usElbVDDCI_LevelArrayOffset));
> -
> -                       if (profile->ucElbVDDC_Num > 0) {
> -                               for (i = 0; i < profile->ucElbVDDC_Num; i++) {
> -                                       if (vddc_id_buf[i] == virtual_voltage_id) {
> -                                               for (j = 0; j < profile->ucLeakageBinNum; j++) {
> -                                                       if (vbios_voltage_id <= leakage_bin[j]) {
> -                                                               *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i];
> -                                                               break;
> -                                                       }
> -                                               }
> +       }
> +
> +       if (size < sizeof(ATOM_ASIC_PROFILING_INFO_V2_1))
> +               return -EINVAL;
> +
> +       leakage_bin = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
> +                le16_to_cpu(profile->usLeakageBinArrayOffset));
> +       vddc_id_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
> +                le16_to_cpu(profile->usElbVDDC_IdArrayOffset));
> +       vddc_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
> +                le16_to_cpu(profile->usElbVDDC_LevelArrayOffset));
> +       vddci_id_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
> +                le16_to_cpu(profile->usElbVDDCI_IdArrayOffset));
> +       vddci_buf = (u16 *)(adev->mode_info.atom_context->bios + data_offset +
> +                le16_to_cpu(profile->usElbVDDCI_LevelArrayOffset));
> +
> +       if (profile->ucElbVDDC_Num > 0) {
> +               for (i = 0; i < profile->ucElbVDDC_Num; i++) {
> +                       if (vddc_id_buf[i] == virtual_voltage_id) {
> +                               for (j = 0; j < profile->ucLeakageBinNum; j++) {
> +                                       if (vbios_voltage_id <= leakage_bin[j]) {
> +                                               *vddc = vddc_buf[j * profile->ucElbVDDC_Num + i];
>                                                 break;
>                                         }
>                                 }
> +                               break;
>                         }
> -                       if (profile->ucElbVDDCI_Num > 0) {
> -                               for (i = 0; i < profile->ucElbVDDCI_Num; i++) {
> -                                       if (vddci_id_buf[i] == virtual_voltage_id) {
> -                                               for (j = 0; j < profile->ucLeakageBinNum; j++) {
> -                                                       if (vbios_voltage_id <= leakage_bin[j]) {
> -                                                               *vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i];
> -                                                               break;
> -                                                       }
> -                                               }
> +               }
> +       }
> +
> +       if (profile->ucElbVDDCI_Num > 0) {
> +               for (i = 0; i < profile->ucElbVDDCI_Num; i++) {
> +                       if (vddci_id_buf[i] == virtual_voltage_id) {
> +                               for (j = 0; j < profile->ucLeakageBinNum; j++) {
> +                                       if (vbios_voltage_id <= leakage_bin[j]) {
> +                                               *vddci = vddci_buf[j * profile->ucElbVDDCI_Num + i];
>                                                 break;
>                                         }
>                                 }
> +                               break;
>                         }
> -                       break;
> -               default:
> -                       DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
> -                       return -EINVAL;
>                 }
> -               break;
> -       default:
> -               DRM_ERROR("Unknown table version %d, %d\n", frev, crev);
> -               return -EINVAL;
>         }
>
>         return 0;
> --
> 2.31.0
>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
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      reply	other threads:[~2021-04-01 21:12 UTC|newest]

Thread overview: 2+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-31 13:11 [PATCH] amd/amdgpu: code refactoring to clean code style a bit Bernard Zhao
2021-04-01 21:12 ` Alex Deucher [this message]

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