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a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:cc; bh=JWIALOfRV45nZL/1N9LGPRT4zFymvH5lqcJFH+DWMrc=; b=YOIUaqBzq05MFzkNXQtp2kXRS+Rjs7RIsIHqAw4UJlJ/X9hmdtD8dLGBYhgYZHmdBG RlawqSuEOd7wOdXanZKVlhSFHiVXRirBMYcdEE6y5o1QMSmZTPiQRL4fgyAgfs34rZ5L xzHG9/EHLe6panLhL3LCtqEcCS6F2AxHDjEtnhZ5uVAcQNr0ov2n/JtYy4HJsilvWpyf RBu2QyZMfaStQg2kBohUihq8XuSJJQhgJJ52CEtnAFqW2Gbos/Wj/qczQbVPMOf9jYtf WzeL+8/EiH4wS3eXz+nXn4pER44qMeoOt0uMuYstgew/e/tufh6PBk4oS5KcmlKwLdt2 Eghg== X-Gm-Message-State: AOAM532BgtA1jxL1eQ8H1hmK2e03dnm7Ke/66hFT+OhYIWip4d8cUSwA yPLkjI53wdgK7DVF4fDaiH0EHUEzFgR4n5BK3hU= X-Received: by 2002:a6b:6204:: with SMTP id f4mt4397749iog.56.1596804763620; Fri, 07 Aug 2020 05:52:43 -0700 (PDT) MIME-Version: 1.0 References: <1594388491-15129-1-git-send-email-simhavcs@gmail.com> In-Reply-To: From: Vinay Simha B N Date: Fri, 7 Aug 2020 18:22:31 +0530 Message-ID: Subject: Re: [PATCH v8 1/2] dt-binding: Add DSI/LVDS TC358775 bridge bindings X-Mailman-Approved-At: Mon, 10 Aug 2020 07:35:59 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , David Airlie , open list , "open list:DRM DRIVERS" , Rob Herring , Sam Ravnborg Content-Type: multipart/mixed; boundary="===============1800014402==" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" --===============1800014402== Content-Type: multipart/alternative; boundary="000000000000b7608a05ac49145f" --000000000000b7608a05ac49145f Content-Type: text/plain; charset="UTF-8" Hi All, Please Review the patch On Wed, Jul 29, 2020 at 6:01 PM Vinay Simha B N wrote: > Hi All, > > Please Review the patch > > On Fri, Jul 10, 2020 at 7:11 PM Vinay Simha BN wrote: > >> - license modified to (GPL-2.0-only OR BSD-2-Clause) >> - single-link and dual-link lvds description and >> examples are added >> - proper indentation >> - VESA/JEIDA formats picked from panel-lvds dts >> - dsi data-lanes property removed, it will be picked >> from dsi0 ports >> - dual-link lvds port added and implemented >> - converted from .txt to .yaml >> >> Signed-off-by: Vinay Simha BN >> Reviewed-by: Sam Ravnborg >> Reviewed-by: Rob Herring >> --- >> v1: >> Initial version wast .txt file >> >> v2: >> From txt to yaml file format >> >> v3: >> * Andrzej Hajda review comments incorporated >> dual port lvds implemented >> >> * Laurent Pinchart review comments incorporated >> dsi lanes property removed and it is dynamically >> picked from the dsi ports >> VESA/JEIDA format picked from panel-lvds dts >> >> v4: >> * Sam Ravnborg review comments incorporated >> }' is indented properly in examples data-lanes >> description for single-link and dual-link lvds >> >> v5: >> * Sam Ravnborg review comments incorporated >> license modified to (GPL-2.0-only OR BSD-2-Clause) >> changelog added >> >> v6: >> * No changes, revision version mentioned to inline with >> driver file >> >> v7: >> * change log added >> Reviewed-by: Sam Ravnborg >> >> v8: >> * Reviewed-by: Rob Herring >> * change log modified in reverse chronological order >> --- >> .../bindings/display/bridge/toshiba,tc358775.yaml | 215 >> +++++++++++++++++++++ >> 1 file changed, 215 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml >> >> diff --git >> a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml >> b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml >> new file mode 100644 >> index 0000000..31f085d >> --- /dev/null >> +++ >> b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml >> @@ -0,0 +1,215 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Toshiba TC358775 DSI to LVDS bridge bindings >> + >> +maintainers: >> + - Vinay Simha BN >> + >> +description: | >> + This binding supports DSI to LVDS bridge TC358775 >> + >> + MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane. >> + Video frame size: >> + Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display >> panel >> + limited by 135 MHz LVDS speed >> + Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS >> display >> + panel, limited by 270 MHz LVDS speed. >> + >> +properties: >> + compatible: >> + const: toshiba,tc358775 >> + >> + reg: >> + maxItems: 1 >> + description: i2c address of the bridge, 0x0f >> + >> + vdd-supply: >> + maxItems: 1 >> + description: 1.2V LVDS Power Supply >> + >> + vddio-supply: >> + maxItems: 1 >> + description: 1.8V IO Power Supply >> + >> + stby-gpios: >> + maxItems: 1 >> + description: Standby pin, Low active >> + >> + reset-gpios: >> + maxItems: 1 >> + description: Hardware reset, Low active >> + >> + ports: >> + type: object >> + description: >> + A node containing input and output port nodes with endpoint >> definitions >> + as documented in >> + Documentation/devicetree/bindings/media/video-interfaces.txt >> + properties: >> + "#address-cells": >> + const: 1 >> + >> + "#size-cells": >> + const: 0 >> + >> + port@0: >> + type: object >> + description: | >> + DSI Input. The remote endpoint phandle should be a >> + reference to a valid mipi_dsi_host device node. >> + >> + port@1: >> + type: object >> + description: | >> + Video port for LVDS output (panel or connector). >> + >> + port@2: >> + type: object >> + description: | >> + Video port for Dual link LVDS output (panel or connector). >> + >> + required: >> + - port@0 >> + - port@1 >> + >> +required: >> + - compatible >> + - reg >> + - vdd-supply >> + - vddio-supply >> + - stby-gpios >> + - reset-gpios >> + - ports >> + >> +examples: >> + - | >> + #include >> + >> + /* For single-link LVDS display panel */ >> + >> + i2c@78b8000 { >> + /* On High speed expansion */ >> + label = "HS-I2C2"; >> + reg = <0x078b8000 0x500>; >> + clock-frequency = <400000>; /* fastmode operation */ >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + tc_bridge: bridge@f { >> + compatible = "toshiba,tc358775"; >> + reg = <0x0f>; >> + >> + vdd-supply = <&pm8916_l2>; >> + vddio-supply = <&pm8916_l6>; >> + >> + stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>; >> + reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + d2l_in_test: endpoint { >> + remote-endpoint = <&dsi0_out>; >> + }; >> + }; >> + >> + port@1 { >> + reg = <1>; >> + lvds_out: endpoint { >> + remote-endpoint = <&panel_in>; >> + }; >> + }; >> + }; >> + }; >> + }; >> + >> + dsi@1a98000 { >> + reg = <0x1a98000 0x25c>; >> + reg-names = "dsi_ctrl"; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + port@1 { >> + reg = <1>; >> + dsi0_out: endpoint { >> + remote-endpoint = <&d2l_in_test>; >> + data-lanes = <0 1 2 3>; >> + }; >> + }; >> + }; >> + }; >> + >> + - | >> + /* For dual-link LVDS display panel */ >> + >> + i2c@78b8000 { >> + /* On High speed expansion */ >> + label = "HS-I2C2"; >> + reg = <0x078b8000 0x500>; >> + clock-frequency = <400000>; /* fastmode operation */ >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + tc_bridge_dual: bridge@f { >> + compatible = "toshiba,tc358775"; >> + reg = <0x0f>; >> + >> + vdd-supply = <&pm8916_l2>; >> + vddio-supply = <&pm8916_l6>; >> + >> + stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>; >> + reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + port@0 { >> + reg = <0>; >> + d2l_in_dual: endpoint { >> + remote-endpoint = <&dsi0_out_dual>; >> + }; >> + }; >> + >> + port@1 { >> + reg = <1>; >> + lvds0_out: endpoint { >> + remote-endpoint = <&panel_in0>; >> + }; >> + }; >> + >> + port@2 { >> + reg = <2>; >> + lvds1_out: endpoint { >> + remote-endpoint = <&panel_in1>; >> + }; >> + }; >> + }; >> + }; >> + }; >> + >> + dsi@1a98000 { >> + reg = <0x1a98000 0x25c>; >> + reg-names = "dsi_ctrl"; >> + >> + ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + port@1 { >> + reg = <1>; >> + dsi0_out_dual: endpoint { >> + remote-endpoint = <&d2l_in_dual>; >> + data-lanes = <0 1 2 3>; >> + }; >> + }; >> + }; >> + }; >> +... >> -- >> 2.1.2 >> >> > > -- > regards, > vinaysimha > -- regards, vinaysimha --000000000000b7608a05ac49145f Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi All,

Please Review the pa= tch

On Wed, Jul 29, 2020 at 6:01 PM Vinay Simha B N <simhavcs@gmail.com> wrote:
Hi All,

Please Review the patch

On Fri, Jul 10, 2020= at 7:11 PM Vinay Simha BN <simhavcs@gmail.com> wrote:
- license modified to (GPL-2.0-only OR BSD-2-= Clause)
- single-link and dual-link lvds description and
=C2=A0 examples are added
- proper indentation
- VESA/JEIDA formats picked from panel-lvds dts
- dsi data-lanes property removed, it will be picked
=C2=A0 from dsi0 ports
- dual-link lvds port added and implemented
- converted from .txt to .yaml

Signed-off-by: Vinay Simha BN <simhavcs@gmail.com>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Rob Herring <robh@kernel.org>
---
v1:
=C2=A0Initial version wast .txt file

v2:
=C2=A0From txt to yaml file format

v3:
* Andrzej Hajda review comments incorporated
=C2=A0 dual port lvds implemented

* Laurent Pinchart review comments incorporated
=C2=A0 dsi lanes property removed and it is dynamically
=C2=A0 picked from the dsi ports
=C2=A0 VESA/JEIDA format picked from panel-lvds dts

v4:
* Sam Ravnborg review comments incorporated
=C2=A0 }' is indented properly in examples data-lanes
=C2=A0 description for single-link and dual-link lvds

v5:
* Sam Ravnborg review comments incorporated
=C2=A0 license modified to (GPL-2.0-only OR BSD-2-Clause)
=C2=A0 changelog added

v6:
* No changes, revision version mentioned to inline with
=C2=A0 driver file

v7:
* change log added
=C2=A0 Reviewed-by: Sam Ravnborg <sam@ravnborg.org>

v8:
* Reviewed-by: Rob Herring <robh@kernel.org>
* change log modified in reverse chronological order
---
=C2=A0.../bindings/display/bridge/toshiba,tc358775.yaml=C2=A0 | 215 +++++++= ++++++++++++++
=C2=A01 file changed, 215 insertions(+)
=C2=A0create mode 100644 Documentation/devicetree/bindings/display/bridge/t= oshiba,tc358775.yaml

diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358= 775.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc35877= 5.yaml
new file mode 100644
index 0000000..31f085d
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yam= l
@@ -0,0 +1,215 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schem= as/display/bridge/toshiba,tc358775.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#=
+
+title: Toshiba TC358775 DSI to LVDS bridge bindings
+
+maintainers:
+ - Vinay Simha BN <simhavcs@gmail.com>
+
+description: |
+ This binding supports DSI to LVDS bridge TC358775
+
+ MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane.<= br> + Video frame size:
+ Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display pane= l
+ limited by 135 MHz LVDS speed
+ Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS displ= ay
+ panel, limited by 270 MHz LVDS speed.
+
+properties:
+=C2=A0 compatible:
+=C2=A0 =C2=A0 const: toshiba,tc358775
+
+=C2=A0 reg:
+=C2=A0 =C2=A0 maxItems: 1
+=C2=A0 =C2=A0 description: i2c address of the bridge, 0x0f
+
+=C2=A0 vdd-supply:
+=C2=A0 =C2=A0 maxItems: 1
+=C2=A0 =C2=A0 description:=C2=A0 1.2V LVDS Power Supply
+
+=C2=A0 vddio-supply:
+=C2=A0 =C2=A0 maxItems: 1
+=C2=A0 =C2=A0 description: 1.8V IO Power Supply
+
+=C2=A0 stby-gpios:
+=C2=A0 =C2=A0 maxItems: 1
+=C2=A0 =C2=A0 description: Standby pin, Low active
+
+=C2=A0 reset-gpios:
+=C2=A0 =C2=A0 maxItems: 1
+=C2=A0 =C2=A0 description: Hardware reset, Low active
+
+=C2=A0 ports:
+=C2=A0 =C2=A0 type: object
+=C2=A0 =C2=A0 description:
+=C2=A0 =C2=A0 =C2=A0 A node containing input and output port nodes with en= dpoint definitions
+=C2=A0 =C2=A0 =C2=A0 as documented in
+=C2=A0 =C2=A0 =C2=A0 Documentation/devicetree/bindings/media/video-interfa= ces.txt
+=C2=A0 =C2=A0 properties:
+=C2=A0 =C2=A0 =C2=A0 "#address-cells":
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 const: 1
+
+=C2=A0 =C2=A0 =C2=A0 "#size-cells":
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 const: 0
+
+=C2=A0 =C2=A0 =C2=A0 port@0:
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 type: object
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 description: |
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 DSI Input. The remote endpoint phandle = should be a
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reference to a valid mipi_dsi_host devi= ce node.
+
+=C2=A0 =C2=A0 =C2=A0 port@1:
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 type: object
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 description: |
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 Video port for LVDS output (panel or co= nnector).
+
+=C2=A0 =C2=A0 =C2=A0 port@2:
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 type: object
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 description: |
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 Video port for Dual link LVDS output (p= anel or connector).
+
+=C2=A0 =C2=A0 required:
+=C2=A0 =C2=A0 =C2=A0 - port@0
+=C2=A0 =C2=A0 =C2=A0 - port@1
+
+required:
+ - compatible
+ - reg
+ - vdd-supply
+ - vddio-supply
+ - stby-gpios
+ - reset-gpios
+ - ports
+
+examples:
+ - |
+=C2=A0 =C2=A0 #include <dt-bindings/gpio/gpio.h>
+
+=C2=A0 =C2=A0 /* For single-link LVDS display panel */
+
+=C2=A0 =C2=A0 i2c@78b8000 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* On High speed expansion */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 label =3D "HS-I2C2";
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 reg =3D <0x078b8000 0x500>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 clock-frequency =3D <400000>; /* fastmod= e operation */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 #address-cells =3D <1>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 #size-cells =3D <0>;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 tc_bridge: bridge@f {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 compatible =3D "toshiba,tc3= 58775";
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reg =3D <0x0f>;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 vdd-supply =3D <&pm8916_l= 2>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 vddio-supply =3D <&pm8916= _l6>;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 stby-gpios =3D <&msmgpio = 99 GPIO_ACTIVE_LOW>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reset-gpios =3D <&msmgpio= 72 GPIO_ACTIVE_LOW>;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 ports {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 #address-cells =3D= <1>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 #size-cells =3D &l= t;0>;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 port@0 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reg = =3D <0>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 d2l_= in_test: endpoint {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 remote-endpoint =3D <&dsi0_out>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }; +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 port@1 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reg = =3D <1>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 lvds= _out: endpoint {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 remote-endpoint =3D <&panel_in>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }; +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+=C2=A0 =C2=A0 };
+
+=C2=A0 =C2=A0 dsi@1a98000 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 reg =3D <0x1a98000 0x25c>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 reg-names =3D "dsi_ctrl";
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 ports {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 #address-cells =3D <1>; +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 #size-cells =3D <0>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 port@1 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reg =3D <1>;=
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 dsi0_out: endpoint= {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 remo= te-endpoint =3D <&d2l_in_test>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 data= -lanes =3D <0 1 2 3>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0};
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0};
+=C2=A0 =C2=A0 =C2=A0};
+
+ - |
+=C2=A0 =C2=A0 /* For dual-link LVDS display panel */
+
+=C2=A0 =C2=A0 i2c@78b8000 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 /* On High speed expansion */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 label =3D "HS-I2C2";
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 reg =3D <0x078b8000 0x500>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 clock-frequency =3D <400000>; /* fastmod= e operation */
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 #address-cells =3D <1>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 #size-cells =3D <0>;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 tc_bridge_dual: bridge@f {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 compatible =3D "toshiba,tc3= 58775";
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reg =3D <0x0f>;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 vdd-supply =3D <&pm8916_l= 2>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 vddio-supply =3D <&pm8916= _l6>;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 stby-gpios =3D <&msmgpio = 99 GPIO_ACTIVE_LOW>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reset-gpios =3D <&msmgpio= 72 GPIO_ACTIVE_LOW>;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 ports {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 #address-cells =3D= <1>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 #size-cells =3D &l= t;0>;
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 port@0 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reg = =3D <0>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 d2l_= in_dual: endpoint {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 remote-endpoint =3D <&dsi0_out_dual>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }; +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 port@1 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reg = =3D <1>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 lvds= 0_out: endpoint {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 remote-endpoint =3D <&panel_in0>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }; +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 port@2 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reg = =3D <2>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 lvds= 1_out: endpoint {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 remote-endpoint =3D <&panel_in1>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }; +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+=C2=A0 =C2=A0 };
+
+=C2=A0 =C2=A0 dsi@1a98000 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 reg =3D <0x1a98000 0x25c>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 reg-names =3D "dsi_ctrl";
+
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 ports {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 #address-cells =3D <1>; +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 #size-cells =3D <0>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 port@1 {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 reg =3D <1>;=
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 dsi0_out_dual: end= point {
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 remo= te-endpoint =3D <&d2l_in_dual>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 data= -lanes =3D <0 1 2 3>;
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 };
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0};
+=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0};
+=C2=A0 =C2=A0 =C2=A0};
+...
--
2.1.2



--
regards,vinaysimha


--
regards,
vinaysimha
--000000000000b7608a05ac49145f-- --===============1800014402== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel --===============1800014402==--