From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 37E64C433EF for ; Mon, 25 Jul 2022 09:10:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3F12E8F8D2; Mon, 25 Jul 2022 09:10:06 +0000 (UTC) Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) by gabe.freedesktop.org (Postfix) with ESMTPS id 92CF18F8D2 for ; Mon, 25 Jul 2022 09:10:05 +0000 (UTC) Received: by mail-ej1-x633.google.com with SMTP id bp15so19391755ejb.6 for ; Mon, 25 Jul 2022 02:10:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=BSEtgg8+Hpw/EtiHjL5IRktNHYkZQ4l9B8QMcHNKzRs=; b=DvY9h9DoO0kblI5Gb7JOwMF5uAXyYh+0N98faLjkVtDpKYgYiZXw8rUpaon1Qsb+x/ y8PR5FRgsPRxbCvYRmi6JyQZHxlbh7MXccC1nAKDIdus48fm9phu/mVPu5c/7jnzpiUa CeYdC3SruNmPOz8QR4pQRYz+9lbX/PiafhwNwu9n1G7QLCs3uqxyNxwD3CM2frokPBsH DkjmmlsnQziUrFfN7mDBzyVBjS82vigYVYvIcaX8uI8LEUmNiadHmdk5ix5lNuZ/1UZ/ NGL0Cy1cT3KvSr2YKUSTaA8mjLj8kGwovaeEc5qHPC+CgkPbA4CYf9Td2TeI9EthK4eN F2CQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=BSEtgg8+Hpw/EtiHjL5IRktNHYkZQ4l9B8QMcHNKzRs=; b=aQKMEO8v2U2O+eXO27fOYzrKenBzHc03M4zYGNo8VnCg3uNKehut5W35mUvIH46eMp 000wIbUrEUBL/o1FFkpOKQq7pdV0tGg5ElMLvDzf2eoK3l3P8POzONreaZzjhGJRYCLi VRob5KZWhSa3whi1tYAhJGAY7XSGYQOVhJeHi/gZlmI+2FhxBbQ82SUmM4YUi4ClSJw/ gKiCoU0AHS+qkwrc3S4Vi7/IomEiWa5eIdjEQIWUrYNU4oEIZjqjcOTg0NFaLt4wZ7Tv I8Y8I6yKA/SfW3SheeE26IgQfnlPTTmq88A52/BSe31RE2gug7NWWLHezniZB1g9nKFf pPJQ== X-Gm-Message-State: AJIora/4PEvDDje2VBeUTqDVK/JwYtsmnks7GTYrCPwXD1pgcovl9wqS T0kaJhfI1sfzuozWMNpeOoPcaXhKStKi5+EQrIg= X-Google-Smtp-Source: AGRyM1u9Nn1gh/K3al7D9YTYNDVE3nZB3C3o2fD7AeOdyqGaPbXnVSlqvpk1KEgMM6wZM2t+cB6cSp8E5+GGA2PWOz8= X-Received: by 2002:a17:907:6297:b0:72f:9aad:fcb with SMTP id nd23-20020a170907629700b0072f9aad0fcbmr9108533ejc.161.1658740203874; Mon, 25 Jul 2022 02:10:03 -0700 (PDT) MIME-Version: 1.0 References: <20220722102407.2205-1-peterwu.pub@gmail.com> <20220722102407.2205-8-peterwu.pub@gmail.com> In-Reply-To: From: Andy Shevchenko Date: Mon, 25 Jul 2022 11:09:26 +0200 Message-ID: Subject: Re: [PATCH v6 07/13] mfd: mt6370: Add MediaTek MT6370 support To: ChiaEn Wu Content-Type: text/plain; charset="UTF-8" X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:FRAMEBUFFER LAYER" , "Krogerus, Heikki" , Krzysztof Kozlowski , Alice Chen , linux-iio , dri-devel , Liam Girdwood , cy_huang , Pavel Machek , Lee Jones , Linux LED Subsystem , Daniel Thompson , Helge Deller , Rob Herring , Chunfeng Yun , Guenter Roeck , devicetree , Linux PM , szuni chen , Mark Brown , "moderated list:ARM/Mediatek SoC support" , Matthias Brugger , linux-arm Mailing List , Jingoo Han , USB , Sebastian Reichel , Linux Kernel Mailing List , ChiaEn Wu , Greg Kroah-Hartman , Jonathan Cameron Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On Mon, Jul 25, 2022 at 11:06 AM ChiaEn Wu wrote: > On Mon, Jul 25, 2022 at 4:43 PM Andy Shevchenko > wrote: ... > > > > > +#define MT6370_REG_DEV_INFO 0x100 > > > > > +#define MT6370_REG_CHG_IRQ1 0x1C0 > > > > > +#define MT6370_REG_CHG_MASK1 0x1E0 > > > > > + > > > > > +#define MT6370_VENID_MASK GENMASK(7, 4) > > > > > + > > > > > +#define MT6370_NUM_IRQREGS 16 > > > > > +#define MT6370_USBC_I2CADDR 0x4E > > > > > > > > > +#define MT6370_REG_ADDRLEN 2 > > > > > +#define MT6370_REG_MAXADDR 0x1FF > > > > > > > > These two more logically to have near to other _REG_* definitions above. ... > > You lost me. Namespace has a meaning, i.e. grouping items of a kind. > > In your proposal I don't see that. If REG_MAXADDR and REG_ADDRLEN are > > _not_ of the _REG_ kind as per above, why do they have this namespace > > in the first place? > oh... Sorry, I just got the wrong meaning > maybe it should be revised like this, right?? I don't know. I am not an author of the code, I do not have access (and don't want to) to the hardware datasheets, all up to you. From the style perspective below looks good. > ------------------------------------------------------------------- > #define MT6370_REG_DEV_INFO 0x100 > #define MT6370_REG_CHG_IRQ1 0x1C0 > #define MT6370_REG_CHG_MASK1 0x1E0 > #define MT6370_REG_MAXADDR 0x1FF // Move it to here > > #define MT6370_VENID_MASK GENMASK(7, 4) > > #define MT6370_NUM_IRQREGS 16 > #define MT6370_USBC_I2CADDR 0x4E > > #define MT6370_MAX_ADDRLEN 2 // Rename -- With Best Regards, Andy Shevchenko