Re: [PULL] drm-intel-next

[Daniel Vetter <daniel.vetter@ffwll.ch>]

Imo we should take this as a personal failure of anyone, things
happen. Instead this is a good opportunity to improve our scripts, to
make sure we catch this in the future.

Cheers, Daniel

On Tue, May 15, 2018 at 3:16 PM, Wang, Zhi A <zhi.a.wang@intel.com> wrote:
> Hi:
>
> I am truly sorry for the mess. It's actual my fault of solving a patch dependency by rebasing. Jani was trying to help me to catch the deadline, I am very appreciated for Jani's help and I am quite sorry for letting Jani experience this failure. He tried to help but I fail him. As a new guy of managing the pull request and maintenance, I need to learn more and improve our working flow to prevent this happen in future. Sorry for the inconvenience.
>
> Thanks,
> Zhi.
>
> -----Original Message-----
> From: Nikula, Jani
> Sent: Tuesday, May 15, 2018 12:56 PM
> To: Dave Airlie <airlied@gmail.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>; Jani Nikula <jani.nikula@linux.intel.com>; Joonas Lahtinen <joonas.lahtinen@linux.intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Sean Paul <seanpaul@chromium.org>; Gustavo Padovan <gustavo@padovan.org>; Maarten Lankhorst <maarten.lankhorst@linux.intel.com>; dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; dim-tools@lists.freedesktop.org; Wang, Zhi A <zhi.a.wang@intel.com>; Zhenyu Wang <zhenyuw@linux.intel.com>; Srinivas, Vidya <vidya.srinivas@intel.com>
> Subject: [PULL] drm-intel-next
>
>
> Hi Dave -
>
> So this one contains the problematic pull from gvt. It's got both a backmerge and a rebase. I spotted the rebase, but intentionally let it slide due to the deadline closing, and then completely missed the backmerge. I don't know what I was thinking. My bad, sorry.
>
> We'll need to improve our workflows with the gvt team.
>
> Anyway, here's the pull, wrinkles and all, as discussed on IRC. Let us know if you can tolerate it, or if we need to rewrite history.
>
> BR,
> Jani.
>
>
> PS. Regarding the changelog, Vidya Srinivas <vidya.srinivas@intel.com> had a huge role in the NV12 work, but alas I failed to give proper credit because the patches were based on earlier work by Chandra.
>
>
> drm-intel-next-2018-05-14:
> Last drm/i915 changes for v4.18:
>
> - NV12 enabling (Chandra, Maarten)
> - ICL workarounds (Oscar)
> - ICL basic DPLL enabling (Paulo)
> - GVT updates
> - DP link config refactoring (Jani)
> - Module parameter to override DMC firmware (Jani)
> - PSR updates (José, DK, Daniel, Ville)
> - ICL DP vswing programming (Manasi)
> - ICL DBuf slice updates (Mahesh)
> - Selftest fixes and updates (Chris, Matthew, Oscar)
> - Execlist fixes and updates (Chris)
> - Stolen memory first 4k fix (Hans de Goede)
> - wait_for fixes (Mika)
> - Tons of GEM improvements (Chris)
> - Plenty of other fixes and improvements (Everyone)
> - Crappy changelog (Me)
>
> BR,
> Jani.
>
> The following changes since commit 0ab390262c4920f26f8202063a268d5fc829728e:
>
>   Merge tag 'drm-misc-next-2018-04-26' of git://anongit.freedesktop.org/drm/drm-misc into drm-next (2018-04-30 09:32:43 +1000)
>
> are available in the git repository at:
>
>   git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2018-05-14
>
> for you to fetch changes up to 01f83786f9ab9c8883ce634cb9a0de51086ad7ea:
>
>   drm/i915: Update DRIVER_DATE to 20180514 (2018-05-14 15:28:05 +0300)
>
> ----------------------------------------------------------------
> Last drm/i915 changes for v4.18:
>
> - NV12 enabling (Chandra, Maarten)
> - ICL workarounds (Oscar)
> - ICL basic DPLL enabling (Paulo)
> - GVT updates
> - DP link config refactoring (Jani)
> - Module parameter to override DMC firmware (Jani)
> - PSR updates (José, DK, Daniel, Ville)
> - ICL DP vswing programming (Manasi)
> - ICL DBuf slice updates (Mahesh)
> - Selftest fixes and updates (Chris, Matthew, Oscar)
> - Execlist fixes and updates (Chris)
> - Stolen memory first 4k fix (Hans de Goede)
> - wait_for fixes (Mika)
> - Tons of GEM improvements (Chris)
> - Plenty of other fixes and improvements (Everyone)
> - Crappy changelog (Me)
>
> ----------------------------------------------------------------
> Abhay Kumar (1):
>       drm/i915/audio: set minimum CD clock to twice the BCLK
>
> Andy Shevchenko (1):
>       i915: Convert to use match_string() helper
>
> Anusha Srivatsa (1):
>       drm/i915/firmware: Correct URL for firmware
>
> Chandra Konduru (3):
>       drm/i915: Add NV12 support to intel_framebuffer_init
>       drm/i915: Add NV12 as supported format for primary plane
>       drm/i915: Add NV12 as supported format for sprite plane
>
> Changbin Du (1):
>       drm/i915/gvt: Remove disable_warn_untrack and print untracked mmio with debug level
>
> Chris Wilson (53):
>       drm/i915: Check whitelist registers across resets
>       drm/i915: Call i915_perf_fini() on init_hw error unwind
>       drm/i915: Move the priotree struct to its own headers
>       drm/i915: Rename priotree to sched
>       drm/i915: Pack params to engine->schedule() into a struct
>       drm/i915: Build request info on stack before printk
>       drm/i915: Don't dump umpteen thousand requests
>       drm/i915: Skip printing global offsets for per-engine scratch pages
>       drm/i915/breadcrumbs: Keep the fake irq armed across reset
>       drm/i915: Use memset64() to align the ring with MI_NOOP
>       drm/i915: Remove obsolete min/max freq setters from debugfs
>       drm/i915: Compile out engine debug for release
>       drm/i915/selftests: Wait for idle between idle resets as well
>       drm/i915/lrc: Scrub the GPU state of the guilty hanging request
>       drm/i915: Stop tracking timeline->inflight_seqnos
>       drm/i915: Wrap engine->context_pin() and engine->context_unpin()
>       drm/i915: Retire requests along rings
>       drm/i915: Only track live rings for retiring
>       drm/i915/execlists: Don't trigger preemption if complete
>       drm/i915/selftests: Fix error checking for wait_var_timeout
>       drm/i915: Show ring->start for the ELSP context/request queue
>       drm/i915/guc: Assert we have the doorbell before setting it up
>       drm/i915: Move timeline from GTT to ring
>       drm/i915: Split i915_gem_timeline into individual timelines
>       drm/i915/execlists: Emit i915_trace_request_out for preemption
>       drm/i915: Silence debugging DRM_ERROR for failing to suspend vlv powerwells
>       drm/i915: Reset the hangcheck timestamp before repeating a seqno
>       drm/i915: Mark the hangcheck as idle when unparking the engines
>       drm/i915: Lazily unbind vma on close
>       drm/i915: Keep one request in our ring_list
>       drm/i915/execlists: Drop preemption arbitrations points along the ring
>       drm/i915/gtt: Tidy up duplicate branches in gen8_gmch_probe()
>       drm/i915: Remove assertion of active_rings must be non-empty if active_requests
>       drm/i915/selftests: Skip the execlists tests on !execlists machines
>       drm/i915: Don't request a bug report for unsafe module parameters
>       drm/i915/execlists: Drop unused parameter to lookup_priolist()
>       drm/i915/execlists: Cache the priolist when rescheduling
>       drm/i915/selftests: Refactor common flush_test()
>       drm/i915/selftests: Flush GPU activity before completing live_contexts
>       drm/i915/selftests: Return to kernel context after each test
>       drm/i915: Flush submission tasklet after bumping priority
>       drm/i915: Disable tasklet scheduling across initial scheduling
>       drm/i915: Remove unused i915_flip tracepoints
>       drm/i915: Annotate timeline lock nesting
>       drm/i915/selftests: Create mock_engine() under struct_mutex
>       drm/i915/selftests: Only switch to kernel context when locked
>       drm/i915/execlists: Make submission tasklet hardirq safe
>       drm/i915/guc: Make submission tasklet hardirq safe
>       drm/i915/execlists: Use rmb() to order CSB reads
>       Revert "drm/i915/cnl: Use mmio access to context status buffer"
>       drm/i915/oa: Check that OA is disabled before unpinning
>       drm/i915/execlists: Relax CSB force-mmio for VT-d
>       drm/i915: Mark up nested spinlocks
>
> Colin Ian King (1):
>       drm/i915/selftests: fix spelling mistake: "parmaters" -> "parameters"
>
> Daniel Vetter (2):
>       drm/i915: Remove skl dc6 enable/disable functions
>       drm/i915: Enable edp psr error interrupts on hsw
>
> Dhinakaran Pandiyan (3):
>       drm/i915/psr: Control PSR interrupts via debugfs
>       drm/i915/psr: Timestamps for PSR entry and exit interrupts.
>       drm/i915/psr: Check if VBT says PSR can be enabled.
>
> Florent Flament (1):
>       drm/i915: Fix drm:intel_enable_lvds ERROR message in kernel log
>
> Gaurav K Singh (1):
>       drm/i915/audio: Fix audio detection issue on GLK
>
> Gustavo A. R. Silva (3):
>       drm/i915/gvt/scheduler: Remove unnecessary NULL checks in sr_oa_regs
>       drm/i915/gvt: Mark expected switch fall-through in handle_g2v_notification
>       drm/i915/selftests: Fix uninitialized variable
>
> Hans de Goede (1):
>       drm/i915: Do NOT skip the first 4k of stolen memory for pre-allocated buffers v2
>
> Ian W MORRISON (1):
>       drm/i915/glk: Add MODULE_FIRMWARE for Geminilake
>
> Imre Deak (2):
>       drm/i915: Enable display WA#1183 from its correct spot
>       drm/i915: Add documentation to gen9_set_dc_state()
>
> James Ausmus (1):
>       drm/i915/icl: Don't set pipe CSC/Gamma in PLANE_COLOR_CTL
>
> Jani Nikula (14):
>       drm/i915/dsi: improve dphy param limits logging
>       Merge tag 'gvt-next-2018-04-23' of https://github.com/intel/gvt-linux into drm-intel-next-queued
>       drm/i915: prefer INTEL_GEN() over INTEL_INFO()->gen
>       drm/i915/dp: remove stale comment about bw constants
>       drm/i915/dp: move link_bw and rate_select debugging where used
>       drm/i915/dp: abstract dp link config computation from the rest
>       drm/i915/dp: move eDP VBT bpp clamping code to intel_dp_compute_bpp()
>       drm/i915/dp: group link config limits in a struct
>       drm/i915/dp: abstract link config selection
>       drm/i915/dp: fix compliance test adjustments
>       Merge drm/drm-next into drm-intel-next-queued
>       drm/i915: add support for specifying DMC firmware override by module param
>       Merge tag 'gvt-next-2018-05-14' of https://github.com/intel/gvt-linux into drm-intel-next-queued
>       drm/i915: Update DRIVER_DATE to 20180514
>
> José Roberto de Souza (4):
>       drm/i915/fbdev: Enable late fbdev initial configuration
>       drm/i915/psr/skl+: Print information about what caused a PSR exit
>       drm/i915/debugfs: Print sink PSR status
>       drm/i915/psr/cnl: Set y-coordinate as valid in SDP
>
> Lyude Paul (1):
>       drm/atomic: Print debug message on atomic check failure
>
> Maarten Lankhorst (2):
>       drm/i915: Enable display workaround 827 for all planes, v2.
>       drm/i915: Add skl_check_nv12_surface for NV12
>
> Mahesh Kumar (3):
>       drm/i915/icl: track dbuf slice-2 status
>       drm/i915/icl: Enable 2nd DBuf slice only when needed
>       drm/i915/icl: update ddb entry start/end mask during hw ddb readout
>
> Manasi Navare (2):
>       drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI
>       drm/i915/icl: Fix the DP Max Voltage for ICL
>
> Matt Atwood (1):
>       drm/i915/kbl: Add KBL GT2 sku
>
> Matthew Auld (3):
>       drm/i915/userptr: reject zero user_size
>       drm/i915: don't leak the pin_map on error
>       drm/i915/selftests: scrub 64K
>
> Matthias Kaehlcke (1):
>       drm/i915: Disable some extra clang warnings
>
> Michel Thierry (1):
>       drm/i915/gen9: Add WaClearHIZ_WM_CHICKEN3 for bxt and glk
>
> Mika Kuoppala (4):
>       drm/i915: Use ktime on wait_for
>       drm/i915: Add compiler barrier to wait_for
>       drm/i915: Print error state times relative to capture
>       drm/i915/gtt: Trust the uncached store to flush wcb
>
> Oscar Mateo (15):
>       drm/i915/selftests: Handle a potential failure of intel_ring_begin
>       drm/i915/icl: Correctly clear lost ctx-switch interrupts across reset for Gen11
>       drm/i915/icl: Introduce initial Icelake Workarounds
>       drm/i915/icl: Enable Sampler DFR
>       drm/i915/icl: WaGAPZPriorityScheme
>       drm/i915/icl: WaL3BankAddressHashing
>       drm/i915/icl: WaModifyGamTlbPartitioning
>       drm/i915/icl: WaDisableCleanEvicts
>       drm/i915/icl: WaCL2SFHalfMaxAlloc
>       drm/i915/icl: WaDisCtxReload
>       drm/i915/icl: Wa_1405779004
>       drm/i915/icl: Wa_1406680159
>       drm/i915/icl: Wa_1604302699
>       drm/i915/icl: Wa_1406838659
>       drm/i915/icl: WaForwardProgressSoftReset
>
> Paulo Zanoni (5):
>       drm/i915/icl: add definitions for the ICL PLL registers
>       drm/i915/icl: add basic support for the ICL clocks
>       drm/i915/icl: compute the combo PHY (DPLL) HDMI registers
>       drm/i915/icl: compute the combo PHY (DPLL) DP registers
>       drm/i915/icl: compute the MG PLL registers
>
> Piorkowski, Piotr (1):
>       drm/i915/guc: Remove GUC_CTL_DEVICE_INFO parameter
>
> Rodrigo Vivi (1):
>       drm/i915: Adjust eDP's logical vco in a reliable place.
>
> Tarun (1):
>       drm/i915: Remove redundant check for negative timeout while doing an atomic pipe update
>
> Tomasz Lis (1):
>       drm/i915/icl: Add configuring MOCS in new Icelake engines
>
> Tvrtko Ursulin (2):
>       drm/i915: Use seqlock in engine stats
>       drm/i915: Include priority and completed status in request in/out tracepoints
>
> Vidya Srinivas (1):
>       drm/i915: Enable Display WA 0528
>
> Ville Syrjälä (3):
>       drm/i915: Protect PIPE_CONF_CHECK macros with do {} while(0)
>       drm/i915: Enable edp psr error interrupts on bdw+
>       drm/i915: Correctly populate user mode h/vdisplay with pipe src size during readout
>
> Weinan Li (1):
>       Revert "drm/i915/gvt: set max priority for gvt context"
>
> Zhao Yan (4):
>       drm/i915/gvt: scan non-privileged batch buffer for debug purpose
>       drm/i915/gvt: let NOPID be the default value of force_to_nonpriv registers
>       drm/i915/gvt: do not return error on handling force_to_nonpriv registers
>       drm/i915/gvt: let force_to_nonpriv cmd handler only valid for LRI cmd
>
> Zhi Wang (1):
>       Merge branch 'drm-intel-next-queued' into gvt-next
>
> Zhipeng Gong (2):
>       drm/i915/gvt: Use real time to do timer check
>       drm/i915/gvt: Update time slice more frequently
>
> osé Roberto de Souza (1):
>       drm/i915/psr: Prevent PSR exit when a non-pipe related register is written
>
>  Documentation/gpu/i915.rst                         | 141 ++-
>  drivers/gpu/drm/drm_atomic.c                       |  10 +-
>  drivers/gpu/drm/i915/Kconfig.debug                 |  13 +
>  drivers/gpu/drm/i915/Makefile                      |  20 +-
>  drivers/gpu/drm/i915/gvt/cmd_parser.c              |  81 +-
>  drivers/gpu/drm/i915/gvt/debugfs.c                 |  72 +-
>  drivers/gpu/drm/i915/gvt/gvt.h                     |   2 +-
>  drivers/gpu/drm/i915/gvt/handlers.c                |  35 +-
>  drivers/gpu/drm/i915/gvt/mmio.c                    |   2 -
>  drivers/gpu/drm/i915/gvt/mmio_context.c            |   2 +-
>  drivers/gpu/drm/i915/gvt/sched_policy.c            |  31 +-
>  drivers/gpu/drm/i915/gvt/scheduler.c               |  89 +-
>  drivers/gpu/drm/i915/gvt/scheduler.h               |   1 +
>  drivers/gpu/drm/i915/gvt/trace.h                   |  24 +-
>  drivers/gpu/drm/i915/i915_debugfs.c                | 566 ++++++------
>  drivers/gpu/drm/i915/i915_drv.c                    |  81 +-
>  drivers/gpu/drm/i915/i915_drv.h                    | 424 ++-------
>  drivers/gpu/drm/i915/i915_gem.c                    | 394 +++++----
>  drivers/gpu/drm/i915/i915_gem.h                    |  13 +
>  drivers/gpu/drm/i915/i915_gem_batch_pool.c         |  30 +-
>  drivers/gpu/drm/i915/i915_gem_batch_pool.h         |  29 +-
>  drivers/gpu/drm/i915/i915_gem_context.c            |  62 +-
>  drivers/gpu/drm/i915/i915_gem_context.h            |  43 +-
>  drivers/gpu/drm/i915/i915_gem_execbuffer.c         |  32 +-
>  drivers/gpu/drm/i915/i915_gem_gtt.c                |  70 +-
>  drivers/gpu/drm/i915/i915_gem_gtt.h                |   5 +-
>  drivers/gpu/drm/i915/i915_gem_stolen.c             | 178 ++--
>  drivers/gpu/drm/i915/i915_gem_timeline.c           | 154 ----
>  drivers/gpu/drm/i915/i915_gem_userptr.c            |   3 +
>  drivers/gpu/drm/i915/i915_gpu_error.c              |  66 +-
>  drivers/gpu/drm/i915/i915_gpu_error.h              | 366 ++++++++
>  drivers/gpu/drm/i915/i915_irq.c                    | 410 +++++----
>  drivers/gpu/drm/i915/i915_oa_icl.c                 | 118 +++
>  drivers/gpu/drm/i915/i915_oa_icl.h                 |  34 +
>  drivers/gpu/drm/i915/i915_params.c                 |   3 +
>  drivers/gpu/drm/i915/i915_params.h                 |   3 +-
>  drivers/gpu/drm/i915/i915_pci.c                    |   1 +
>  drivers/gpu/drm/i915/i915_perf.c                   |  96 ++-
>  drivers/gpu/drm/i915/i915_pmu.c                    |  27 +-
>  drivers/gpu/drm/i915/i915_pmu.h                    |  30 +-
>  drivers/gpu/drm/i915/i915_reg.h                    | 882 ++++++++++---------
>  drivers/gpu/drm/i915/i915_request.c                | 438 +++++-----
>  drivers/gpu/drm/i915/i915_request.h                |  49 +-
>  drivers/gpu/drm/i915/i915_scheduler.h              |  72 ++
>  drivers/gpu/drm/i915/i915_timeline.c               | 105 +++
>  .../i915/{i915_gem_timeline.h => i915_timeline.h}  |  71 +-
>  drivers/gpu/drm/i915/i915_trace.h                  | 129 ++-
>  drivers/gpu/drm/i915/i915_utils.h                  |  10 +-
>  drivers/gpu/drm/i915/i915_vma.c                    |  73 +-
>  drivers/gpu/drm/i915/i915_vma.h                    |   6 +
>  drivers/gpu/drm/i915/intel_atomic.c                |  19 +-
>  drivers/gpu/drm/i915/intel_atomic_plane.c          |   7 +-
>  drivers/gpu/drm/i915/intel_bios.c                  |  18 +-
>  drivers/gpu/drm/i915/intel_breadcrumbs.c           |  52 +-
>  drivers/gpu/drm/i915/intel_cdclk.c                 |  41 +-
>  drivers/gpu/drm/i915/intel_csr.c                   |  10 +-
>  drivers/gpu/drm/i915/intel_ddi.c                   | 451 +++++++++-
>  drivers/gpu/drm/i915/intel_device_info.c           | 169 +++-
>  drivers/gpu/drm/i915/intel_device_info.h           |   4 +-
>  drivers/gpu/drm/i915/intel_display.c               | 470 +++++++---
>  drivers/gpu/drm/i915/intel_display.h               |   4 +
>  drivers/gpu/drm/i915/intel_dp.c                    | 318 +++----
>  drivers/gpu/drm/i915/intel_dp_link_training.c      |   5 +
>  drivers/gpu/drm/i915/intel_dp_mst.c                |   8 +-
>  drivers/gpu/drm/i915/intel_dpio_phy.c              |  11 +-
>  drivers/gpu/drm/i915/intel_dpll_mgr.c              | 909 +++++++++++++++++---
>  drivers/gpu/drm/i915/intel_dpll_mgr.h              |  97 ++-
>  drivers/gpu/drm/i915/intel_drv.h                   |  84 +-
>  drivers/gpu/drm/i915/intel_dsi_vbt.c               |  34 +-
>  drivers/gpu/drm/i915/intel_engine_cs.c             | 933 +++++---------------
>  drivers/gpu/drm/i915/intel_fbc.c                   |  28 +
>  drivers/gpu/drm/i915/intel_fbdev.c                 |   5 +-
>  drivers/gpu/drm/i915/intel_frontbuffer.c           |   2 +-
>  drivers/gpu/drm/i915/intel_gpu_commands.h          | 274 ++++++
>  drivers/gpu/drm/i915/intel_guc.c                   | 231 +++--
>  drivers/gpu/drm/i915/intel_guc.h                   |  82 +-
>  drivers/gpu/drm/i915/intel_guc_ads.c               |   9 +-
>  drivers/gpu/drm/i915/intel_guc_ct.c                | 545 ++++++++++--
>  drivers/gpu/drm/i915/intel_guc_ct.h                |  18 +-
>  drivers/gpu/drm/i915/intel_guc_fw.c                |   7 +-
>  drivers/gpu/drm/i915/intel_guc_fwif.h              | 162 +++-
>  drivers/gpu/drm/i915/intel_guc_log.c               | 544 +++++-------
>  drivers/gpu/drm/i915/intel_guc_log.h               |  59 +-
>  drivers/gpu/drm/i915/intel_guc_reg.h               |  14 +-
>  drivers/gpu/drm/i915/intel_guc_submission.c        | 114 ++-
>  drivers/gpu/drm/i915/intel_hangcheck.c             |  16 +-
>  drivers/gpu/drm/i915/intel_hdcp.c                  | 185 ++--
>  drivers/gpu/drm/i915/intel_hdmi.c                  |  40 +-
>  drivers/gpu/drm/i915/intel_hotplug.c               |   3 +
>  drivers/gpu/drm/i915/intel_huc.c                   |  30 +-
>  drivers/gpu/drm/i915/intel_huc.h                   |   7 +
>  drivers/gpu/drm/i915/intel_huc_fw.c                |   8 +-
>  drivers/gpu/drm/i915/intel_lrc.c                   | 538 ++++++++----
>  drivers/gpu/drm/i915/intel_lrc.h                   |   2 +-
>  drivers/gpu/drm/i915/intel_lvds.c                  |   3 +-
>  drivers/gpu/drm/i915/intel_mocs.c                  |   5 +-
>  drivers/gpu/drm/i915/intel_overlay.c               |   1 +
>  drivers/gpu/drm/i915/intel_pipe_crc.c              |  75 +-
>  drivers/gpu/drm/i915/intel_pm.c                    | 578 ++++++++-----
>  drivers/gpu/drm/i915/intel_psr.c                   | 444 ++++++----
>  drivers/gpu/drm/i915/intel_ringbuffer.c            |  78 +-
>  drivers/gpu/drm/i915/intel_ringbuffer.h            |  71 +-
>  drivers/gpu/drm/i915/intel_runtime_pm.c            | 101 ++-
>  drivers/gpu/drm/i915/intel_sprite.c                |  36 +-
>  drivers/gpu/drm/i915/intel_uc.c                    | 132 +--
>  drivers/gpu/drm/i915/intel_uc.h                    |   5 +-
>  drivers/gpu/drm/i915/intel_uc_fw.c                 |  13 +-
>  drivers/gpu/drm/i915/intel_uc_fw.h                 |  24 +-
>  drivers/gpu/drm/i915/intel_uncore.c                | 175 +++-
>  drivers/gpu/drm/i915/intel_uncore.h                |   1 +
>  drivers/gpu/drm/i915/intel_wopcm.c                 | 275 ++++++
>  drivers/gpu/drm/i915/intel_wopcm.h                 |  31 +
>  drivers/gpu/drm/i915/intel_workarounds.c           | 949 +++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_workarounds.h           |  17 +
>  drivers/gpu/drm/i915/selftests/huge_pages.c        |   5 +-
>  drivers/gpu/drm/i915/selftests/i915_gem_context.c  |   3 +
>  .../gpu/drm/i915/selftests/i915_live_selftests.h   |   2 +
>  .../gpu/drm/i915/selftests/i915_mock_selftests.h   |   1 +
>  .../{i915_gem_timeline.c => i915_timeline.c}       |  94 +-
>  drivers/gpu/drm/i915/selftests/i915_vma.c          |   2 +-
>  drivers/gpu/drm/i915/selftests/igt_flush_test.c    |  70 ++
>  drivers/gpu/drm/i915/selftests/igt_flush_test.h    |  14 +
>  drivers/gpu/drm/i915/selftests/intel_breadcrumbs.c |   5 +-
>  drivers/gpu/drm/i915/selftests/intel_engine_cs.c   |  58 ++
>  drivers/gpu/drm/i915/selftests/intel_hangcheck.c   | 414 +++++----
>  drivers/gpu/drm/i915/selftests/intel_lrc.c         | 459 ++++++++++
>  drivers/gpu/drm/i915/selftests/intel_workarounds.c | 291 +++++++
>  drivers/gpu/drm/i915/selftests/mock_engine.c       |  67 +-
>  drivers/gpu/drm/i915/selftests/mock_gem_device.c   |  21 +-
>  drivers/gpu/drm/i915/selftests/mock_gtt.c          |   1 -
>  drivers/gpu/drm/i915/selftests/mock_timeline.c     |  45 +-
>  drivers/gpu/drm/i915/selftests/mock_timeline.h     |  28 +-
>  include/drm/drm_dp_helper.h                        |  10 +
>  include/drm/i915_pciids.h                          |   1 +
>  134 files changed, 11452 insertions(+), 5316 deletions(-)  delete mode 100644 drivers/gpu/drm/i915/i915_gem_timeline.c
>  create mode 100644 drivers/gpu/drm/i915/i915_gpu_error.h
>  create mode 100644 drivers/gpu/drm/i915/i915_oa_icl.c
>  create mode 100644 drivers/gpu/drm/i915/i915_oa_icl.h
>  create mode 100644 drivers/gpu/drm/i915/i915_scheduler.h
>  create mode 100644 drivers/gpu/drm/i915/i915_timeline.c
>  rename drivers/gpu/drm/i915/{i915_gem_timeline.h => i915_timeline.h} (68%)  create mode 100644 drivers/gpu/drm/i915/intel_gpu_commands.h
>  create mode 100644 drivers/gpu/drm/i915/intel_wopcm.c
>  create mode 100644 drivers/gpu/drm/i915/intel_wopcm.h
>  create mode 100644 drivers/gpu/drm/i915/intel_workarounds.c
>  create mode 100644 drivers/gpu/drm/i915/intel_workarounds.h
>  rename drivers/gpu/drm/i915/selftests/{i915_gem_timeline.c => i915_timeline.c} (70%)  create mode 100644 drivers/gpu/drm/i915/selftests/igt_flush_test.c
>  create mode 100644 drivers/gpu/drm/i915/selftests/igt_flush_test.h
>  create mode 100644 drivers/gpu/drm/i915/selftests/intel_engine_cs.c
>  create mode 100644 drivers/gpu/drm/i915/selftests/intel_lrc.c
>  create mode 100644 drivers/gpu/drm/i915/selftests/intel_workarounds.c
>
> --
> Jani Nikula, Intel Open Source Technology Center



-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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