From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PULL] drm-intel-next Date: Thu, 24 Oct 2013 16:56:35 +0200 Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-ie0-f170.google.com (mail-ie0-f170.google.com [209.85.223.170]) by gabe.freedesktop.org (Postfix) with ESMTP id D1D26E7CBA for ; Thu, 24 Oct 2013 07:56:36 -0700 (PDT) Received: by mail-ie0-f170.google.com with SMTP id at1so4205768iec.29 for ; Thu, 24 Oct 2013 07:56:35 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org Errors-To: dri-devel-bounces+sf-dri-devel=m.gmane.org@lists.freedesktop.org To: Dave Airlie Cc: Intel Graphics Development , DRI Development List-Id: dri-devel@lists.freedesktop.org Hi Dave, drm-intel-next-2013-10-18: - CRC support from Damien and He Shuang. Long term this should allow us to test an awful lot modesetting corner cases automatically. So for me as the maintainer this is really big. - HDMI audio fix from Jani. - VLV dpll computation code refactoring from Ville. - Fixups for the gpu booster from last time around (Chris). - Some cleanups in the context code from Ben. - More watermark work from Ville (we'll be getting there ...). - vblank timestamp improvements from Ville. - CONFIG_FB=3Dn support, including drm core changes to make the fbdev helpers optional. - DP link training improvements (Jani). - mmio vtable from Ben, prep work for future hw. There shouldn't be a conflict with drm-next (but I haven't done an explicit test-merge). But there's quite a bit of fun with -fixes going on. Maybe we need some backmerge ... Cheers, Daniel The following changes since commit 967ad7f1489da7babbe0746f81c283458ecd3f84: Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next (2013-10-10 12:44:43 +0200) are available in the git repository at: git://people.freedesktop.org/~danvet/drm-intel tags/drm-intel-next-2013-1= 0-18 for you to fetch changes up to 6da7f10d296f4ac625f96b39eef22c41398727e3: drm/i915/dp: don't mention eDP bpp clamping if it doesn't affect bpp (2013-10-18 16:00:06 +0200) ---------------------------------------------------------------- Artem Bityutskiy (1): drm/i915: preserve dispaly init order on ByT Ben Widawsky (12): drm/i915: Use the real cpu max frequency for ring scaling drm/i915: Prevent using uninitialized MMIO funcs drm/i915: Move edram detection early_sanitize drm/i915: Create MMIO virtual functions drm/i915: Extract common MMIO lines drm/i915: Create GEN specific read MMIO drm/i915: Create GEN specific write MMIO drm/i915: Remove gen specific checks in MMIO drm/i915: Do PCH and uncore init earlier drm/i915: Do a fuller init after reset drm/i915: cleanup context fini drm/i915: Replace has_bsd/blt/vebox with a mask Chon Ming Lee (1): drm/i915: Move some hdmi enable function name to vlv specific. Chris Wilson (7): drm/i915: Call io_schedule() whilst whilsting for the GPU drm/i915: Fix type mismatch and accounting in i915_gem_shrink drm/i915: Undo the PIPEA quirk for i845 drm/i915: Capture the initial error-state when kicking stuck rings drm/i915: Avoid tweaking RPS before it is enabled drm/i915: Add breadcrumbs for why the backlight is being set drm/i915: Disable all GEM timers and work on unload Damien Lespiau (16): drm/i915: Remove yet another unused define drm/i915: Keep the CRC values into a circular buffer drm/i915: Sample the frame counter instead of a timestamp for CRCs drm/i915: Make switching to the same CRC source a no-op drm/i915: Enforce going back to none before changing CRC source drm/i915: Empty the circular buffer when asked for a new source drm/i915: Dynamically allocate the CRC circular buffer drm/i915: Generalize the CRC command format for future work drm/i915: Rename i915_pipe_crc_ctl to i915_display_crc_ctl drm/i915: Warn if we receive an interrupt after freeing the buffer drm/i915: Add log messages when CRCs collection is started/stopped drm/i915: Move drm_add_fake_info_node() higher in the file drm/i915: Implement blocking read for pipe CRC files drm/i915: Only one open() allowed on pipe CRC result files drm/i915: Enable pipe CRCs drm/i915: Use pipe_name() instead of the pipe number Daniel Vetter (24): drm/i915: check that the i965g/gm 4G limit is really obeyed drm/i915: rip out gen2 reset code drm/i915: Keep intel_drv.h tidy drm/i915: Educate users in dmesg about reporting gpu hangs drm: Add separate Kconfig option for fbdev helpers drm/i915: Kconfig option to disable the legacy fbdev support drm/i915: rename intel_fb.c to intel_fbdev.c drm/i915: Add a control file for pipe CRCs drm/i915: static inline for dummy crc functions drm/i915: constify harder drm/i915: grab dev->struct_mutex around framebuffer_init drm/i915: prevent tiling changes on framebuffer backing storage drm/i915: Use unsigned long for obj->user_pin_count drm/i915: check gem bo size when creating framebuffers cpufreq: Add dummy cpufreq_cpu_get/put for CONFIG_CPU_FREQ=3Dn drm/i915: don't Oops in debugfs for I915_FBDEV=3Dn drm/i915: extract display_pipe_crc_update drm/i915: add CRC #defines for ilk/snb drm/i915: wire up CRC interrupt for ilk/snb drm/i915: use ->get_vblank_counter for the crc frame counter drm/i915: wait one vblank when disabling CRCs drm/i915: fix CRC debugfs setup drm/i915: crc support for hsw drm/i915: remove dead code in ironlake_crtc_mode_set Imre Deak (1): drm/i915: vlv: fix VGA hotplug after modeset Jani Nikula (8): drm/i915/dp: use sizeof for memset instead of magic value drm/i915/dp: promote clock recovery failures to DRM_ERROR drm/i915/dp: update training set in a burst write with training pattern set drm/i915: tell the user KMS is required for gen6+ drm/i915/dp: constify link_status drm/i915: pass mode to ELD write vfuncs drm/i915: set HDMI pixel clock in audio configuration drm/i915/dp: don't mention eDP bpp clamping if it doesn't affect bpp Jesse Barnes (2): drm/i915: don't save/restore CACHE_MODE_0 on gen7+ drm/i915/vlv: add doc names to sideband file Paulo Zanoni (3): drm/i915: wait for IPS_ENABLE when enabling IPS drm/i915: don't leak dp_connector at intel_ddi_init drm/i915: increase the SWSCI DSLP default timeout to 50ms Shuang He (1): drm/i915: Expose latest 200 CRC value for pipe through debugfs Thomas Wood (1): drm: add support for additional stereo 3D modes Tom O'Rourke (1): drm/i915: Finish enabling rps before use by sysfs or debugfs Ville Syrj=E4l=E4 (54): drm/i915: Make vlv_find_best_dpll() ppm calculation safe drm/i915: Don't underflow bestppm drm/i915: Rewrite vlv_find_best_dpll() drm/i915: De-magic the VLV p2 divider step size drm/i915: Make sure we respect n.max on VLV drm/i915: Clarify VLV PLL p1 limits drm/i915: Allow p1 divider 2 on VLV drm/i915: Respect p2 divider minimum limit on VLV drm/i915: Remove the unused p and m limits for VLV drm/i915: Remove unused dot_limit from VLV PLL limits drm/i915: intel_limits_vlv_dac and intel_limits_vlv_hdmi are the same drm/i915: Don't lie about findind suitable PLL settings on VLV drm/i915: Use intel_PLL_is_valid() in vlv_find_best_dpll() drm/i915: Fix VGA_DISP_DISABLE check drm/i915: Set primary_disabled in intel_{enable, disable}_plane drm/i915: Allow sprites to be configured on a disabled pipe drm/i915: Reduce the time we hold struct mutex in sprite update_plane= code drm/i915: Kill a goto from sprite disable code drm/i915: Do a bit of cleanup in the sprite code drm/i915: Save user requested plane coordinates only on success drm/i915: Do the fbc vs. primary plane enable/disable in the right or= der drm/i915: Enable/disable IPS when primary is enabled/disabled drm/i915: Rename intel_flush_display_plane to intel_flush_primary_pla= ne drm/i915: Rename intel_{enable, disable}_plane to intel_{enable, disable}_primary_plane drm/i915: WARN if primary plane state doesn't match expectations drm/i915: Flush primary plane changes in sprite code drm/i915: Populate primary_disabled in intel_modeset_readout_hw_state= () drm/i915: Rename primary_disabled to primary_enabled drm/i915: Fix pipe off timeout handling for pre-gen4 drm/i915: Fix VLV frame counter registers drm/i915: Fix pre-CTG vblank counter drm/i915: Use DIV_ROUND_CLOSEST() to calculate dot/vco drm/i915: Use vlv_clock() in vlv_crtc_clock_get() drm/i915: Skip register reads in i915_get_crtc_scanoutpos() drm/i915: Fix scanoutpos calculations drm/i915: Improve the accuracy of get_scanout_pos on CTG+ drm/i915: Fix gen2 scanout position readout drm/i915: Don't pretend that gen2 has a hardware frame counter drm/i915: Add intel_pipe_wm and prepare for watermark pre-compute drm/i915: Don't re-compute pipe watermarks except for the affected pi= pe drm/i915: Move LP1+ watermark merging out from hsw_compute_wm_results= () drm/i915: Use intel_pipe_wm in hsw_find_best_results drm/i915: Move some computations out from hsw_compute_wm_parameters() drm/i915: Check 5/6 DDB split only when sprites are enabled drm/i915: Refactor wm_lp to level calculation drm/i915: Kill fbc_wm_enabled from intel_wm_config drm/i915: Store current watermark state in dev_priv->wm drm/i915: Improve watermark dirtyness checks drm/i915: Init HSW watermark tracking in intel_modeset_setup_hw_state= () drm/i915: Remove a somewhat silly debug print from watermark code drm/i915: Adjust watermark register masks drm/i915: Rename ilk_wm_max to ilk_compute_wm_maximums drm/i915: Rename ilk_check_wm to ilk_validate_wm_level drm/i915: Check 5/6 DDB split only when sprites are enabled drivers/gpu/drm/Kconfig | 69 +-- drivers/gpu/drm/Makefile | 3 +- drivers/gpu/drm/ast/Kconfig | 1 + drivers/gpu/drm/cirrus/Kconfig | 1 + drivers/gpu/drm/drm_crtc_helper.c | 4 + drivers/gpu/drm/drm_edid.c | 103 +++- drivers/gpu/drm/drm_fb_helper.c | 4 - drivers/gpu/drm/exynos/Kconfig | 1 + drivers/gpu/drm/gma500/Kconfig | 1 + drivers/gpu/drm/i915/Kconfig | 67 +++ drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/i915_debugfs.c | 570 +++++++++++++++++= +-- drivers/gpu/drm/i915/i915_dma.c | 41 +- drivers/gpu/drm/i915/i915_drv.c | 70 ++- drivers/gpu/drm/i915/i915_drv.h | 134 +++-- drivers/gpu/drm/i915/i915_gem.c | 86 +-- drivers/gpu/drm/i915/i915_gem_context.c | 17 +- drivers/gpu/drm/i915/i915_gem_tiling.c | 2 +- drivers/gpu/drm/i915/i915_gpu_error.c | 8 +- drivers/gpu/drm/i915/i915_irq.c | 298 +++++++++-- drivers/gpu/drm/i915/i915_reg.h | 101 +++- drivers/gpu/drm/i915/i915_suspend.c | 7 +- drivers/gpu/drm/i915/i915_sysfs.c | 10 + drivers/gpu/drm/i915/intel_crt.c | 2 +- drivers/gpu/drm/i915/intel_ddi.c | 62 ++- drivers/gpu/drm/i915/intel_display.c | 400 ++++++++------ drivers/gpu/drm/i915/intel_dp.c | 44 +- drivers/gpu/drm/i915/intel_drv.h | 60 ++- drivers/gpu/drm/i915/intel_dsi.c | 2 +- drivers/gpu/drm/i915/{intel_fb.c =3D> intel_fbdev.c} | 4 +- drivers/gpu/drm/i915/intel_hdmi.c | 12 +- drivers/gpu/drm/i915/intel_opregion.c | 5 +- drivers/gpu/drm/i915/intel_panel.c | 4 + drivers/gpu/drm/i915/intel_pm.c | 584 +++++++++++++----= ---- drivers/gpu/drm/i915/intel_ringbuffer.c | 10 +- drivers/gpu/drm/i915/intel_sideband.c | 5 +- drivers/gpu/drm/i915/intel_sprite.c | 184 ++++--- drivers/gpu/drm/i915/intel_tv.c | 4 +- drivers/gpu/drm/i915/intel_uncore.c | 356 ++++++++----- drivers/gpu/drm/mgag200/Kconfig | 1 + drivers/gpu/drm/msm/Kconfig | 1 + drivers/gpu/drm/nouveau/Kconfig | 1 + drivers/gpu/drm/omapdrm/Kconfig | 1 + drivers/gpu/drm/qxl/Kconfig | 1 + drivers/gpu/drm/rcar-du/Kconfig | 1 + drivers/gpu/drm/shmobile/Kconfig | 1 + drivers/gpu/drm/tilcdc/Kconfig | 1 + drivers/gpu/drm/udl/Kconfig | 1 + drivers/gpu/host1x/drm/Kconfig | 1 + drivers/staging/imx-drm/Kconfig | 1 + include/linux/cpufreq.h | 8 + 51 files changed, 2375 insertions(+), 983 deletions(-) create mode 100644 drivers/gpu/drm/i915/Kconfig rename drivers/gpu/drm/i915/{intel_fb.c =3D> intel_fbdev.c} (98%) -- = Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch