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boundary="===============0588019574==" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" --===============0588019574== Content-Type: multipart/alternative; boundary="000000000000051c10059c0937c3" --000000000000051c10059c0937c3 Content-Type: text/plain; charset="UTF-8" On Mon, Jan 13, 2020 at 8:25 AM Rob Clark wrote: > On Mon, Jan 13, 2020 at 7:37 AM Brian Ho wrote: > > > > Implements an ioctl to wait until a value at a given iova is greater > > than or equal to a supplied value. > > > > This will initially be used by turnip (open-source Vulkan driver for > > QC in mesa) for occlusion queries where the userspace driver can > > block on a query becoming available before continuing via > > vkGetQueryPoolResults. > > > > Signed-off-by: Brian Ho > > --- > > drivers/gpu/drm/msm/msm_drv.c | 63 +++++++++++++++++++++++++++++++++-- > > include/uapi/drm/msm_drm.h | 13 ++++++++ > > 2 files changed, 74 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/msm/msm_drv.c > b/drivers/gpu/drm/msm/msm_drv.c > > index c84f0a8b3f2c..dcc46874a5a2 100644 > > --- a/drivers/gpu/drm/msm/msm_drv.c > > +++ b/drivers/gpu/drm/msm/msm_drv.c > > @@ -36,10 +36,11 @@ > > * MSM_GEM_INFO ioctl. > > * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get > > * GEM object's debug name > > - * - 1.5.0 - Add SUBMITQUERY_QUERY ioctl > > + * - 1.5.0 - Add SUBMITQUEUE_QUERY ioctl > > + * - 1.6.0 - Add WAIT_IOVA ioctl > > */ > > #define MSM_VERSION_MAJOR 1 > > -#define MSM_VERSION_MINOR 5 > > +#define MSM_VERSION_MINOR 6 > > #define MSM_VERSION_PATCHLEVEL 0 > > > > static const struct drm_mode_config_funcs mode_config_funcs = { > > @@ -952,6 +953,63 @@ static int msm_ioctl_submitqueue_close(struct > drm_device *dev, void *data, > > return msm_submitqueue_remove(file->driver_priv, id); > > } > > > > +static int msm_ioctl_wait_iova(struct drm_device *dev, void *data, > > + struct drm_file *file) > > +{ > > + struct msm_drm_private *priv = dev->dev_private; > > + struct drm_gem_object *obj; > > + struct drm_msm_wait_iova *args = data; > > + ktime_t timeout = to_ktime(args->timeout); > > + unsigned long remaining_jiffies = timeout_to_jiffies(&timeout); > > + struct msm_gpu *gpu = priv->gpu; > > + void *base_vaddr; > > + uint64_t *vaddr; > > + int ret; > > + > > + if (args->pad) > > + return -EINVAL; > > + > > + if (!gpu) > > + return 0; > > hmm, I'm not sure we should return zero in this case.. maybe -ENODEV? > > > + > > + obj = drm_gem_object_lookup(file, args->handle); > > + if (!obj) > > + return -ENOENT; > > + > > + base_vaddr = msm_gem_get_vaddr(obj); > > + if (IS_ERR(base_vaddr)) { > > + ret = PTR_ERR(base_vaddr); > > + goto err_put_gem_object; > > + } > > + if (args->offset + sizeof(*vaddr) > obj->size) { > > + ret = -EINVAL; > > + goto err_put_vaddr; > > + } > > + > > + vaddr = base_vaddr + args->offset; > > + > > + /* Assumes WC mapping */ > > + ret = wait_event_interruptible_timeout( > > + gpu->event, *vaddr >= args->value, > remaining_jiffies); > This needs to do the awkward looking (int64_t)(*data - value) >= 0 to properly handle the wraparound case. > + > > + if (ret == 0) { > > + ret = -ETIMEDOUT; > > + goto err_put_vaddr; > > + } else if (ret == -ERESTARTSYS) { > > + goto err_put_vaddr; > > + } > > maybe: > > } else { > ret = 0; > } > > and then drop the next three lines? > > > + > > + msm_gem_put_vaddr(obj); > > + drm_gem_object_put_unlocked(obj); > > + return 0; > > + > > +err_put_vaddr: > > + msm_gem_put_vaddr(obj); > > +err_put_gem_object: > > + drm_gem_object_put_unlocked(obj); > > + return ret; > > +} > > + > > static const struct drm_ioctl_desc msm_ioctls[] = { > > DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, > DRM_RENDER_ALLOW), > > DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, > DRM_RENDER_ALLOW), > > @@ -964,6 +1022,7 @@ static const struct drm_ioctl_desc msm_ioctls[] = { > > DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_NEW, > msm_ioctl_submitqueue_new, DRM_RENDER_ALLOW), > > DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_CLOSE, > msm_ioctl_submitqueue_close, DRM_RENDER_ALLOW), > > DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_QUERY, > msm_ioctl_submitqueue_query, DRM_RENDER_ALLOW), > > + DRM_IOCTL_DEF_DRV(MSM_WAIT_IOVA, msm_ioctl_wait_iova, > DRM_RENDER_ALLOW), > > }; > > > > static const struct vm_operations_struct vm_ops = { > > diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h > > index 0b85ed6a3710..8477f28a4ee1 100644 > > --- a/include/uapi/drm/msm_drm.h > > +++ b/include/uapi/drm/msm_drm.h > > @@ -298,6 +298,17 @@ struct drm_msm_submitqueue_query { > > __u32 pad; > > }; > > > > +/* This ioctl blocks until the u64 value at bo + offset is greater than > or > > + * equal to the reference value. > > + */ > > +struct drm_msm_wait_iova { > > + __u32 handle; /* in, GEM handle */ > > + __u32 pad; > > + struct drm_msm_timespec timeout; /* in */ > > + __u64 offset; /* offset into bo */ > > + __u64 value; /* reference value */ > > Maybe we should go ahead and add a __u64 mask; > > that would let us wait for 32b values as well, and wait for bits in a > bitmask > I think we'd be OK to just default to 32 bit values instead, since most of the CP commands that this is intended to work with (CP_EVENT_WRITE, CP_WAIT_MEM_GTE etc) operate on 32 bit values. We could move 'value' to the slot right after 'handle' but then we'd not have any pad/reserved fields. Maybe we keep 'value' 64 bit but restrict it to 32 bits, with an option to add a 64 bit flag in 'pad' later on? > > Other than those minor comments, it looks pretty good to me > > BR, > -R > > > +}; > > + > > #define DRM_MSM_GET_PARAM 0x00 > > /* placeholder: > > #define DRM_MSM_SET_PARAM 0x01 > > @@ -315,6 +326,7 @@ struct drm_msm_submitqueue_query { > > #define DRM_MSM_SUBMITQUEUE_NEW 0x0A > > #define DRM_MSM_SUBMITQUEUE_CLOSE 0x0B > > #define DRM_MSM_SUBMITQUEUE_QUERY 0x0C > > +#define DRM_MSM_WAIT_IOVA 0x0D > > > > #define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + > DRM_MSM_GET_PARAM, struct drm_msm_param) > > #define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + > DRM_MSM_GEM_NEW, struct drm_msm_gem_new) > > @@ -327,6 +339,7 @@ struct drm_msm_submitqueue_query { > > #define DRM_IOCTL_MSM_SUBMITQUEUE_NEW DRM_IOWR(DRM_COMMAND_BASE + > DRM_MSM_SUBMITQUEUE_NEW, struct drm_msm_submitqueue) > > #define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE DRM_IOW (DRM_COMMAND_BASE + > DRM_MSM_SUBMITQUEUE_CLOSE, __u32) > > #define DRM_IOCTL_MSM_SUBMITQUEUE_QUERY DRM_IOW (DRM_COMMAND_BASE + > DRM_MSM_SUBMITQUEUE_QUERY, struct drm_msm_submitqueue_query) > > +#define DRM_IOCTL_MSM_WAIT_IOVA DRM_IOW (DRM_COMMAND_BASE + > DRM_MSM_WAIT_IOVA, struct drm_msm_wait_iova) > > > > #if defined(__cplusplus) > > } > > -- > > 2.25.0.rc1.283.g88dfdc4193-goog > > > --000000000000051c10059c0937c3 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


=
On Mon, Jan 13, 2020 at 8:25 AM Rob C= lark <robdclark@chromium.org> wrote:
On= Mon, Jan 13, 2020 at 7:37 AM Brian Ho <brian@brkho.com> wrote:
>
> Implements an ioctl to wait until a value at a given iova is greater > than or equal to a supplied value.
>
> This will initially be used by turnip (open-source Vulkan driver for > QC in mesa) for occlusion queries where the userspace driver can
> block on a query becoming available before continuing via
> vkGetQueryPoolResults.
>
> Signed-off-by: Brian Ho <brian@brkho.com>
> ---
>=C2=A0 drivers/gpu/drm/msm/msm_drv.c | 63 +++++++++++++++++++++++++++++= ++++--
>=C2=A0 include/uapi/drm/msm_drm.h=C2=A0 =C2=A0 | 13 ++++++++
>=C2=A0 2 files changed, 74 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_d= rv.c
> index c84f0a8b3f2c..dcc46874a5a2 100644
> --- a/drivers/gpu/drm/msm/msm_drv.c
> +++ b/drivers/gpu/drm/msm/msm_drv.c
> @@ -36,10 +36,11 @@
>=C2=A0 =C2=A0*=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0MSM_GEM_INFO ioc= tl.
>=C2=A0 =C2=A0* - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO suppo= rt to set/get
>=C2=A0 =C2=A0*=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0GEM object's= debug name
> - * - 1.5.0 - Add SUBMITQUERY_QUERY ioctl
> + * - 1.5.0 - Add SUBMITQUEUE_QUERY ioctl
> + * - 1.6.0 - Add WAIT_IOVA ioctl
>=C2=A0 =C2=A0*/
>=C2=A0 #define MSM_VERSION_MAJOR=C2=A0 =C2=A0 =C2=A0 1
> -#define MSM_VERSION_MINOR=C2=A0 =C2=A0 =C2=A0 5
> +#define MSM_VERSION_MINOR=C2=A0 =C2=A0 =C2=A0 6
>=C2=A0 #define MSM_VERSION_PATCHLEVEL 0
>
>=C2=A0 static const struct drm_mode_config_funcs mode_config_funcs =3D = {
> @@ -952,6 +953,63 @@ static int msm_ioctl_submitqueue_close(struct drm= _device *dev, void *data,
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return msm_submitqueue_remove(file-&g= t;driver_priv, id);
>=C2=A0 }
>
> +static int msm_ioctl_wait_iova(struct drm_device *dev, void *data, > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0struct drm_fil= e *file)
> +{
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0struct msm_drm_private *priv =3D dev->d= ev_private;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0struct drm_gem_object *obj;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0struct drm_msm_wait_iova *args =3D data; > +=C2=A0 =C2=A0 =C2=A0 =C2=A0ktime_t timeout =3D to_ktime(args->time= out);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned long remaining_jiffies =3D timeou= t_to_jiffies(&timeout);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0struct msm_gpu *gpu =3D priv->gpu;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0void *base_vaddr;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0uint64_t *vaddr;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0int ret;
> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0if (args->pad)
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return -EINVAL= ;
> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0if (!gpu)
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return 0;

hmm, I'm not sure we should return zero in this case.. maybe -ENODEV?
> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0obj =3D drm_gem_object_lookup(file, args-&= gt;handle);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0if (!obj)
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0return -ENOENT= ;
> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0base_vaddr =3D msm_gem_get_vaddr(obj);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0if (IS_ERR(base_vaddr)) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0ret =3D PTR_ER= R(base_vaddr);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0goto err_put_g= em_object;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0}
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0if (args->offset + sizeof(*vaddr) > = obj->size) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0ret =3D -EINVA= L;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0goto err_put_v= addr;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0}
> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0vaddr =3D base_vaddr + args->offset; > +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0/* Assumes WC mapping */
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0ret =3D wait_event_interruptible_timeout(<= br> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0= =C2=A0 =C2=A0gpu->event, *vaddr >=3D args->value, remaining_jiffi= es);

This needs to do the awkward looki= ng

=C2=A0 (int64_t)(*data - value) >=3D 0

to properly handle the wraparound case.
<= br>
> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0if (ret =3D=3D 0) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0ret =3D -ETIME= DOUT;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0goto err_put_v= addr;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0} else if (ret =3D=3D -ERESTARTSYS) {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0goto err_put_v= addr;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0}

maybe:

=C2=A0} else {
=C2=A0 =C2=A0ret =3D 0;
=C2=A0}

and then drop the next three lines?

> +
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0msm_gem_put_vaddr(obj);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0drm_gem_object_put_unlocked(obj);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0return 0;
> +
> +err_put_vaddr:
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0msm_gem_put_vaddr(obj);
> +err_put_gem_object:
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0drm_gem_object_put_unlocked(obj);
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0return ret;
> +}
> +
>=C2=A0 static const struct drm_ioctl_desc msm_ioctls[] =3D {
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0DRM_IOCTL_DEF_DRV(MSM_GET_PARAM,=C2= =A0 =C2=A0 msm_ioctl_get_param,=C2=A0 =C2=A0 DRM_RENDER_ALLOW),
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0DRM_IOCTL_DEF_DRV(MSM_GEM_NEW,=C2=A0 = =C2=A0 =C2=A0 msm_ioctl_gem_new,=C2=A0 =C2=A0 =C2=A0 DRM_RENDER_ALLOW),
> @@ -964,6 +1022,7 @@ static const struct drm_ioctl_desc msm_ioctls[] = =3D {
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_NEW= ,=C2=A0 =C2=A0msm_ioctl_submitqueue_new,=C2=A0 =C2=A0DRM_RENDER_ALLOW),
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_CLO= SE, msm_ioctl_submitqueue_close, DRM_RENDER_ALLOW),
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_QUE= RY, msm_ioctl_submitqueue_query, DRM_RENDER_ALLOW),
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0DRM_IOCTL_DEF_DRV(MSM_WAIT_IOVA, msm_ioctl= _wait_iova, DRM_RENDER_ALLOW),
>=C2=A0 };
>
>=C2=A0 static const struct vm_operations_struct vm_ops =3D {
> diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h > index 0b85ed6a3710..8477f28a4ee1 100644
> --- a/include/uapi/drm/msm_drm.h
> +++ b/include/uapi/drm/msm_drm.h
> @@ -298,6 +298,17 @@ struct drm_msm_submitqueue_query {
>=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0__u32 pad;
>=C2=A0 };
>
> +/* This ioctl blocks until the u64 value at bo + offset is greater th= an or
> + * equal to the reference value.
> + */
> +struct drm_msm_wait_iova {
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0__u32 handle;=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 /* in, GEM handle */
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0__u32 pad;
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0struct drm_msm_timespec timeout;=C2=A0 =C2= =A0/* in */
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0__u64 offset;=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 /* offset into bo */
> +=C2=A0 =C2=A0 =C2=A0 =C2=A0__u64 value;=C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0/* reference value */

Maybe we should go ahead and add a __u64 mask;

that would let us wait for 32b values as well, and wait for bits in a bitma= sk

I think we'd be OK to just defau= lt to 32 bit values instead, since most of the CP commands that this is int= ended to work with (CP_EVENT_WRITE, CP_WAIT_MEM_GTE etc) operate on 32 bit = values. We could move 'value' to the slot right after 'handle&#= 39; but then we'd not have any pad/reserved fields. Maybe we keep '= value' 64 bit but restrict it to 32 bits, with an option to add a 64 bi= t flag in 'pad' later on?

Other than those minor comments, it looks pretty good to me

BR,
-R

> +};
> +
>=C2=A0 #define DRM_MSM_GET_PARAM=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 0x00
>=C2=A0 /* placeholder:
>=C2=A0 #define DRM_MSM_SET_PARAM=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 0x01
> @@ -315,6 +326,7 @@ struct drm_msm_submitqueue_query {
>=C2=A0 #define DRM_MSM_SUBMITQUEUE_NEW=C2=A0 =C2=A0 =C2=A0 =C2=A0 0x0A<= br> >=C2=A0 #define DRM_MSM_SUBMITQUEUE_CLOSE=C2=A0 =C2=A0 =C2=A0 0x0B
>=C2=A0 #define DRM_MSM_SUBMITQUEUE_QUERY=C2=A0 =C2=A0 =C2=A0 0x0C
> +#define DRM_MSM_WAIT_IOVA=C2=A0 =C2=A0 =C2=A0 0x0D
>
>=C2=A0 #define DRM_IOCTL_MSM_GET_PARAM=C2=A0 =C2=A0 =C2=A0 =C2=A0 DRM_I= OWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
>=C2=A0 #define DRM_IOCTL_MSM_GEM_NEW=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
> @@ -327,6 +339,7 @@ struct drm_msm_submitqueue_query {
>=C2=A0 #define DRM_IOCTL_MSM_SUBMITQUEUE_NEW=C2=A0 =C2=A0 DRM_IOWR(DRM_= COMMAND_BASE + DRM_MSM_SUBMITQUEUE_NEW, struct drm_msm_submitqueue)
>=C2=A0 #define DRM_IOCTL_MSM_SUBMITQUEUE_CLOSE=C2=A0 DRM_IOW (DRM_COMMA= ND_BASE + DRM_MSM_SUBMITQUEUE_CLOSE, __u32)
>=C2=A0 #define DRM_IOCTL_MSM_SUBMITQUEUE_QUERY=C2=A0 DRM_IOW (DRM_COMMA= ND_BASE + DRM_MSM_SUBMITQUEUE_QUERY, struct drm_msm_submitqueue_query)
> +#define DRM_IOCTL_MSM_WAIT_IOVA=C2=A0 =C2=A0 =C2=A0 =C2=A0 DRM_IOW (D= RM_COMMAND_BASE + DRM_MSM_WAIT_IOVA, struct drm_msm_wait_iova)
>
>=C2=A0 #if defined(__cplusplus)
>=C2=A0 }
> --
> 2.25.0.rc1.283.g88dfdc4193-goog
>
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