From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7E336C432BE for ; Sat, 28 Aug 2021 14:12:35 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1A51660EBD for ; Sat, 28 Aug 2021 14:12:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 1A51660EBD Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=crapouillou.net Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1C6D56EA4F; Sat, 28 Aug 2021 14:12:34 +0000 (UTC) Received: from aposti.net (aposti.net [89.234.176.197]) by gabe.freedesktop.org (Postfix) with ESMTPS id DC6ED6EA4F for ; Sat, 28 Aug 2021 14:12:31 +0000 (UTC) Date: Sat, 28 Aug 2021 15:12:19 +0100 From: Paul Cercueil Subject: Re: [PATCH 2/2] drm/panel: Add driver for the AUO A030JTN01 TFT LCD To: Kari Argillander Cc: Thierry Reding , Sam Ravnborg , Rob Herring , Christophe Branchereau , list@opendingux.net, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Message-Id: In-Reply-To: <20210828140139.vwhgcjmgnas4fh7w@kari-VirtualBox> References: <20210828112640.7248-1-paul@crapouillou.net> <20210828112640.7248-2-paul@crapouillou.net> <20210828140139.vwhgcjmgnas4fh7w@kari-VirtualBox> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1; format=flowed Content-Transfer-Encoding: quoted-printable X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi, Le sam., ao=FBt 28 2021 at 17:01:39 +0300, Kari Argillander=20 a =E9crit : > On Sat, Aug 28, 2021 at 12:26:40PM +0100, Paul Cercueil wrote: >> From: Christophe Branchereau >>=20 >> Add driver for the AUO A030JTN01 panel, which is a 320x480 3.0" 4:3 >> 24-bit TFT LCD with non-square pixels and a delta-RGB 8-bit=20 >> interface. >>=20 >> Signed-off-by: Christophe Branchereau >> Signed-off-by: Paul Cercueil >> --- >> drivers/gpu/drm/panel/Kconfig | 8 + >> drivers/gpu/drm/panel/Makefile | 1 + >> drivers/gpu/drm/panel/panel-auo-a030jtn01.c | 297=20 >> ++++++++++++++++++++ >> 3 files changed, 306 insertions(+) >> create mode 100644 drivers/gpu/drm/panel/panel-auo-a030jtn01.c >>=20 >> diff --git a/drivers/gpu/drm/panel/Kconfig=20 >> b/drivers/gpu/drm/panel/Kconfig >> index 0b3784941312..42d42f999266 100644 >> --- a/drivers/gpu/drm/panel/Kconfig >> +++ b/drivers/gpu/drm/panel/Kconfig >> @@ -8,6 +8,14 @@ config DRM_PANEL >> menu "Display Panels" >> depends on DRM && DRM_PANEL >>=20 >> +config DRM_PANEL_AUO_A030JTN01 >> + tristate "AUO A030JTN01" >> + depends on OF && SPI >> + select REGMAP_SPI >> + help >> + Say Y here to enable support for the AUO A030JTN01 320x480 3.0"=20 >> panel >> + as found in the YLM RS-97 handheld gaming console. >> + >=20 > It seems that these should be alphabetical order. You're totally right, sorry about that. >> config DRM_PANEL_ABT_Y030XX067A >> tristate "ABT Y030XX067A 320x480 LCD panel" >> depends on OF && SPI >> diff --git a/drivers/gpu/drm/panel/Makefile=20 >> b/drivers/gpu/drm/panel/Makefile >> index 60c0149fc54a..edf62866e4af 100644 >> --- a/drivers/gpu/drm/panel/Makefile >> +++ b/drivers/gpu/drm/panel/Makefile >> @@ -1,4 +1,5 @@ >> # SPDX-License-Identifier: GPL-2.0 >> +obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) +=3D panel-auo-a030jtn01.o >> obj-$(CONFIG_DRM_PANEL_ABT_Y030XX067A) +=3D panel-abt-y030xx067a.o >> obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) +=3D panel-arm-versatile.o >> obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) +=3D=20 >> panel-asus-z00t-tm5p5-n35596.o >> diff --git a/drivers/gpu/drm/panel/panel-auo-a030jtn01.c=20 >> b/drivers/gpu/drm/panel/panel-auo-a030jtn01.c >> new file mode 100644 >> index 000000000000..804567a59d19 >> --- /dev/null >> +++ b/drivers/gpu/drm/panel/panel-auo-a030jtn01.c >> @@ -0,0 +1,297 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * AU Optronics A030JTN01.0 TFT LCD panel driver >> + * >> + * Copyright (C) 2020, Paul Cercueil >> + * Copyright (C) 2020, Christophe Branchereau=20 >> >=20 > Should these be 2021? The commits were written in 2021, but I guess I can update the date,=20 yes. Cheers, -Paul > Argillander >=20 >> + */ >> + >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> +#include >> + >> +#include >> +#include >> + >> +struct a030jtn01_info { >> + const struct drm_display_mode *display_modes; >> + unsigned int num_modes; >> + u16 width_mm, height_mm; >> + u32 bus_format, bus_flags; >> +}; >> + >> +struct a030jtn01 { >> + struct drm_panel panel; >> + struct spi_device *spi; >> + struct regmap *map; >> + >> + const struct a030jtn01_info *panel_info; >> + >> + struct regulator *supply; >> + struct gpio_desc *reset_gpio; >> +}; >> + >> +static inline struct a030jtn01 *to_a030jtn01(struct drm_panel=20 >> *panel) >> +{ >> + return container_of(panel, struct a030jtn01, panel); >> +} >> + >> +static int a030jtn01_prepare(struct drm_panel *panel) >> +{ >> + struct a030jtn01 *priv =3D to_a030jtn01(panel); >> + struct device *dev =3D &priv->spi->dev; >> + int err; >> + >> + err =3D regulator_enable(priv->supply); >> + if (err) { >> + dev_err(dev, "Failed to enable power supply: %d\n", err); >> + return err; >> + } >> + >> + usleep_range(1000, 8000); >> + >> + /* Reset the chip */ >> + gpiod_set_value_cansleep(priv->reset_gpio, 1); >> + usleep_range(100, 8000); >> + gpiod_set_value_cansleep(priv->reset_gpio, 0); >> + usleep_range(2000, 8000); >> + >> + /* >> + * No idea why two writes are needed. If this write is commented, >> + * the colors are wrong. Doesn't seem to be timing-related, since >> + * a msleep(200) doesn't fix it. >> + */ >> + regmap_write(priv->map, 0x06, 0x00); >> + >> + /* Use (24 + 6) =3D=3D 0x1e as the vertical back porch */ >> + err =3D regmap_write(priv->map, 0x06, 0x1e); >> + if (err) >> + goto err_disable_regulator; >> + >> + /* Use (42 + 30) * 3 =3D=3D 0xd8 as the horizontal back porch */ >> + err =3D regmap_write(priv->map, 0x07, 0xd8); >> + if (err) >> + goto err_disable_regulator; >> + >> + regmap_write(priv->map, 0x05, 0x74); >> + >> + return 0; >> + >> +err_disable_regulator: >> + gpiod_set_value_cansleep(priv->reset_gpio, 1); >> + regulator_disable(priv->supply); >> + return err; >> +} >> + >> +static int a030jtn01_unprepare(struct drm_panel *panel) >> +{ >> + struct a030jtn01 *priv =3D to_a030jtn01(panel); >> + >> + gpiod_set_value_cansleep(priv->reset_gpio, 1); >> + regulator_disable(priv->supply); >> + >> + return 0; >> +} >> + >> +static int a030jtn01_enable(struct drm_panel *panel) >> +{ >> + struct a030jtn01 *priv =3D to_a030jtn01(panel); >> + int ret; >> + >> + ret =3D regmap_write(priv->map, 0x05, 0x75); >> + if (ret) >> + return ret; >> + >> + /* Wait for the picture to be stable */ >> + if (panel->backlight) >> + msleep(100); >> + >> + return 0; >> +} >> + >> +static int a030jtn01_disable(struct drm_panel *panel) >> +{ >> + struct a030jtn01 *priv =3D to_a030jtn01(panel); >> + >> + return regmap_write(priv->map, 0x05, 0x74); >> +} >> + >> +static int a030jtn01_get_modes(struct drm_panel *panel, >> + struct drm_connector *connector) >> +{ >> + struct a030jtn01 *priv =3D to_a030jtn01(panel); >> + const struct a030jtn01_info *panel_info =3D priv->panel_info; >> + struct drm_display_mode *mode; >> + unsigned int i; >> + >> + for (i =3D 0; i < panel_info->num_modes; i++) { >> + mode =3D drm_mode_duplicate(connector->dev, >> + &panel_info->display_modes[i]); >> + if (!mode) >> + return -ENOMEM; >> + >> + drm_mode_set_name(mode); >> + >> + mode->type =3D DRM_MODE_TYPE_DRIVER; >> + if (panel_info->num_modes =3D=3D 1) >> + mode->type |=3D DRM_MODE_TYPE_PREFERRED; >> + >> + drm_mode_probed_add(connector, mode); >> + } >> + >> + connector->display_info.bpc =3D 8; >> + connector->display_info.width_mm =3D panel_info->width_mm; >> + connector->display_info.height_mm =3D panel_info->height_mm; >> + >> + drm_display_info_set_bus_formats(&connector->display_info, >> + &panel_info->bus_format, 1); >> + connector->display_info.bus_flags =3D panel_info->bus_flags; >> + >> + return panel_info->num_modes; >> +} >> + >> +static const struct drm_panel_funcs a030jtn01_funcs =3D { >> + .prepare =3D a030jtn01_prepare, >> + .unprepare =3D a030jtn01_unprepare, >> + .enable =3D a030jtn01_enable, >> + .disable =3D a030jtn01_disable, >> + .get_modes =3D a030jtn01_get_modes, >> +}; >> + >> +static bool a030jtn01_has_reg(struct device *dev, unsigned int reg) >> +{ >> + static const u32 a030jtn01_regs_mask =3D 0x001823f1fb; >> + >> + return a030jtn01_regs_mask & BIT(reg); >> +}; >> + >> +static const struct regmap_config a030jtn01_regmap_config =3D { >> + .reg_bits =3D 8, >> + .val_bits =3D 8, >> + .read_flag_mask =3D 0x40, >> + .max_register =3D 0x1c, >> + .readable_reg =3D a030jtn01_has_reg, >> + .writeable_reg =3D a030jtn01_has_reg, >> +}; >> + >> +static int a030jtn01_probe(struct spi_device *spi) >> +{ >> + struct device *dev =3D &spi->dev; >> + struct a030jtn01 *priv; >> + int err; >> + >> + spi->mode |=3D SPI_MODE_3 | SPI_3WIRE; >> + >> + priv =3D devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); >> + if (!priv) >> + return -ENOMEM; >> + >> + priv->spi =3D spi; >> + spi_set_drvdata(spi, priv); >> + >> + priv->map =3D devm_regmap_init_spi(spi, &a030jtn01_regmap_config); >> + if (IS_ERR(priv->map)) { >> + dev_err(dev, "Unable to init regmap\n"); >> + return PTR_ERR(priv->map); >> + } >> + >> + priv->panel_info =3D of_device_get_match_data(dev); >> + if (!priv->panel_info) >> + return -EINVAL; >> + >> + priv->supply =3D devm_regulator_get(dev, "power"); >> + if (IS_ERR(priv->supply)) { >> + dev_err(dev, "Failed to get power supply\n"); >> + return PTR_ERR(priv->supply); >> + } >> + >> + priv->reset_gpio =3D devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); >> + if (IS_ERR(priv->reset_gpio)) { >> + dev_err(dev, "Failed to get reset GPIO\n"); >> + return PTR_ERR(priv->reset_gpio); >> + } >> + >> + drm_panel_init(&priv->panel, dev, &a030jtn01_funcs, >> + DRM_MODE_CONNECTOR_DPI); >> + >> + err =3D drm_panel_of_backlight(&priv->panel); >> + if (err) >> + return err; >> + >> + drm_panel_add(&priv->panel); >> + >> + return 0; >> +} >> + >> +static int a030jtn01_remove(struct spi_device *spi) >> +{ >> + struct a030jtn01 *priv =3D spi_get_drvdata(spi); >> + >> + drm_panel_remove(&priv->panel); >> + drm_panel_disable(&priv->panel); >> + drm_panel_unprepare(&priv->panel); >> + >> + return 0; >> +} >> + >> +static const struct drm_display_mode a030jtn01_modes[] =3D { >> + { /* 60 Hz */ >> + .clock =3D 14400, >> + .hdisplay =3D 320, >> + .hsync_start =3D 320 + 8, >> + .hsync_end =3D 320 + 8 + 42, >> + .htotal =3D 320 + 8 + 42 + 30, >> + .vdisplay =3D 480, >> + .vsync_start =3D 480 + 90, >> + .vsync_end =3D 480 + 90 + 24, >> + .vtotal =3D 480 + 90 + 24 + 6, >> + .flags =3D DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >> + }, >> + { /* 50 Hz */ >> + .clock =3D 12000, >> + .hdisplay =3D 320, >> + .hsync_start =3D 320 + 8, >> + .hsync_end =3D 320 + 8 + 42, >> + .htotal =3D 320 + 8 + 42 + 30, >> + .vdisplay =3D 480, >> + .vsync_start =3D 480 + 90, >> + .vsync_end =3D 480 + 90 + 24, >> + .vtotal =3D 480 + 90 + 24 + 6, >> + .flags =3D DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC, >> + }, >> +}; >> + >> +static const struct a030jtn01_info a030jtn01_info =3D { >> + .display_modes =3D a030jtn01_modes, >> + .num_modes =3D ARRAY_SIZE(a030jtn01_modes), >> + .width_mm =3D 70, >> + .height_mm =3D 51, >> + .bus_format =3D MEDIA_BUS_FMT_RGB888_3X8_DELTA, >> + .bus_flags =3D DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE, >> +}; >> + >> +static const struct of_device_id a030jtn01_of_match[] =3D { >> + { .compatible =3D "auo,a030jtn01", .data =3D &a030jtn01_info }, >> + { /* sentinel */ } >> +}; >> +MODULE_DEVICE_TABLE(of, a030jtn01_of_match); >> + >> +static struct spi_driver a030jtn01_driver =3D { >> + .driver =3D { >> + .name =3D "auo-a030jtn01", >> + .of_match_table =3D a030jtn01_of_match, >> + }, >> + .probe =3D a030jtn01_probe, >> + .remove =3D a030jtn01_remove, >> +}; >> +module_spi_driver(a030jtn01_driver); >> + >> +MODULE_AUTHOR("Paul Cercueil "); >> +MODULE_AUTHOR("Christophe Branchereau "); >> +MODULE_LICENSE("GPL v2"); >> -- >> 2.33.0 >>=20