From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CD4F7C433B4 for ; Fri, 30 Apr 2021 09:23:21 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F1F6F613CA for ; Fri, 30 Apr 2021 09:23:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F1F6F613CA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=sigxcpu.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 736386F501; Fri, 30 Apr 2021 09:23:20 +0000 (UTC) X-Greylist: delayed 321 seconds by postgrey-1.36 at gabe; Fri, 30 Apr 2021 09:23:19 UTC Received: from honk.sigxcpu.org (honk.sigxcpu.org [24.134.29.49]) by gabe.freedesktop.org (Postfix) with ESMTPS id 416CF6F501 for ; Fri, 30 Apr 2021 09:23:19 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by honk.sigxcpu.org (Postfix) with ESMTP id 40E37FB03; Fri, 30 Apr 2021 11:17:55 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at honk.sigxcpu.org Received: from honk.sigxcpu.org ([127.0.0.1]) by localhost (honk.sigxcpu.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id mNeG7bnrk71z; Fri, 30 Apr 2021 11:17:53 +0200 (CEST) Date: Fri, 30 Apr 2021 11:17:52 +0200 From: Guido =?iso-8859-1?Q?G=FCnther?= To: Liu Ying Subject: Re: [PATCH v3 0/3] drm/bridge: nwl-dsi: Get MIPI DSI controller and PHY ready in ->mode_set() Message-ID: References: <1619170003-4817-1-git-send-email-victor.liu@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1619170003-4817-1-git-send-email-victor.liu@nxp.com> X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jernej.skrabec@siol.net, narmstrong@baylibre.com, airlied@linux.ie, dri-devel@lists.freedesktop.org, jonas@kwiboo.se, linux-kernel@vger.kernel.org, robert.foss@linaro.org, a.hajda@samsung.com, Laurent.pinchart@ideasonboard.com, robert.chiras@nxp.com, linux-imx@nxp.com Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Liu, On Fri, Apr 23, 2021 at 05:26:40PM +0800, Liu Ying wrote: > Hi, > = > This series aims to make the nwl-dsi bridge be able to connect with > more MIPI DSI panels. Some MIPI DSI panel drivers like 'raydium,rm68200' > send MIPI_DCS_SET_DISPLAY_ON commands in panel_funcs->prepare(), which > requires the MIPI DSI controller and PHY to be ready beforehand. > However, the existing nwl-dsi driver gets the MIPI DSI controller and > PHY ready in bridge_funcs->pre_enable(), which happens after the > panel_funcs->prepare(). So, this series shifts the bridge operation > ealier from bridge_funcs->pre_enable() to bridge_funcs->mode_set(). > = > Patch 3/3 does the essential bridge operation shift. > = > Patch 1/3 and 2/3 are split from the original single patch in v2 and > are needed by patch 3/3. This split-up helps clarify changes better. > The split-up is done in this way: > = > 1) Patch 1/3 forces a full modeset when crtc_state->active is changed to > be true(which implies only connector's DPMS is brought out of "Off" > status, though not necessarily). This makes sure ->mode_set() and > ->atomic_disable() will be called in pairs. > 2) Patch 2/3 removes a check on unchanged HS clock rate from ->mode_set(), > to make sure MIPI DSI controller and PHY are brought up and taken down > in pairs. > 3) Patch 3/3 shifts the bridge operation as the last step. Looks good to me and tested on imx8mq Librem 5 Devkit with https://lore.kernel.org/linux-arm-kernel/cover.1617968250.git.agx@sigxcpu.o= rg/ on top so Reviewed-by: Guido G=FCnther Tested-by: Guido G=FCnther Cheers, -- Guido > = > = > v2->v3: > * Split the single patch in v2 into 3 patches. (Neil) > = > v1->v2: > * Fix a typo in commit message - s/unchange/unchanged/ > = > = > Liu Ying (3): > drm/bridge: nwl-dsi: Force a full modeset when crtc_state->active is > changed to be true > drm/bridge: nwl-dsi: Remove a check on unchanged HS clock rate from > ->mode_set() > drm/bridge: nwl-dsi: Get MIPI DSI controller and PHY ready in > ->mode_set() > = > drivers/gpu/drm/bridge/nwl-dsi.c | 86 +++++++++++++++++--------------- > 1 file changed, 46 insertions(+), 40 deletions(-) > = > -- = > 2.25.1 > = _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel