* [PATCH v5 0/2] drm/i915: IRQ fixes
@ 2021-07-01 17:36 Thomas Zimmermann
2021-07-01 17:36 ` [PATCH v5 1/2] drm/i915: Use the correct IRQ during resume Thomas Zimmermann
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Thomas Zimmermann @ 2021-07-01 17:36 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel,
chris, mika.kuoppala, matthew.brost, maarten.lankhorst,
lucas.demarchi, ville.syrjala
Cc: intel-gfx, Thomas Zimmermann, dri-devel
Fix a bug in the usage of IRQs and cleanup references to the DRM
IRQ midlayer.
Preferably this patchset would be merged through drm-misc-next.
v5:
* go back to _hardirq() after CI tests reported atomic
context in PCI probe; add rsp comment
v4:
* switch IRQ code to intel_synchronize_irq() (Daniel)
v3:
* also use intel_synchronize_hardirq() from other callsite
v2:
* split patch
* also fix comment
* add intel_synchronize_hardirq() (Ville)
* update Fixes tag (Daniel)
Thomas Zimmermann (2):
drm/i915: Use the correct IRQ during resume
drm/i915: Drop all references to DRM IRQ midlayer
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ring_submission.c | 7 +++++--
drivers/gpu/drm/i915/i915_drv.c | 1 -
drivers/gpu/drm/i915/i915_irq.c | 10 +++++-----
drivers/gpu/drm/i915/i915_irq.h | 1 +
5 files changed, 12 insertions(+), 9 deletions(-)
base-commit: 67f5a18128770817e4218a9e496d2bf5047c51e8
prerequisite-patch-id: c2b2f08f0eccc9f5df0c0da49fa1d36267deb11d
prerequisite-patch-id: c67e5d886a47b7d0266d81100837557fda34cb24
prerequisite-patch-id: 0cca17365e65370fa95d193ed2f1c88917ee1aef
prerequisite-patch-id: 12b9894350a0b56579d29542943465ef5134751c
prerequisite-patch-id: 3e1c37d3425f4820fe36ea3da57c65e166fe0ee5
prerequisite-patch-id: 1017c860a0bf95ce370d82b8db1745f5548fb321
prerequisite-patch-id: dcc022baab7c172978de9809702c2f4f54323047
prerequisite-patch-id: 0d05ee247042b43d5ab8f3af216e708a8e09bee8
prerequisite-patch-id: 110c411161bed6072c32185940fcd052d0bdb09a
prerequisite-patch-id: d2d1aeccffdfadf2b951487b8605f59c795d84cf
prerequisite-patch-id: 85fe31e27ca13adc0d1bcc7c19b1ce238a77ee6a
prerequisite-patch-id: c61fdacbe035ba5c17f1ff393bc9087f16aaea7b
prerequisite-patch-id: c4821af5dbba4d121769f1da85d91fbb53020ec0
prerequisite-patch-id: 0b20ef3302abfe6dc123dbc54b9dd087865f935b
prerequisite-patch-id: d34eb96cbbdeb91870ace4250ea75920b1653dc2
prerequisite-patch-id: 7f64fce347d15232134d7636ca7a8d9f5bf1a3a0
prerequisite-patch-id: c83be7a285eb6682cdae0df401ab5d4c208f036b
prerequisite-patch-id: eb1a44d2eb2685cea154dd3f17f5f463dfafd39a
prerequisite-patch-id: 92a8c37dae4b8394fd6702f4af58ac7815ac3069
prerequisite-patch-id: f0237988fe4ae6eba143432d1ace8beb52d935f8
prerequisite-patch-id: bcf4d29437ed7cb78225dec4c99249eb40c18302
prerequisite-patch-id: 6407b4c7f1b80af8d329d5f796b30da11959e936
prerequisite-patch-id: 4a69e6e49d691b555f0e0874d638cd204dcb0c48
prerequisite-patch-id: be09cfa8a67dd435a25103b85bd4b1649c5190a3
prerequisite-patch-id: 813ecc9f94251c3d669155faf64c0c9e6a458393
prerequisite-patch-id: beb2b5000a1682cbd74a7e2ab1566fcae5bccbf0
prerequisite-patch-id: 754c8878611864475a0b75fd49ff38e71a21c795
prerequisite-patch-id: d7d4bac3c19f94ba9593143b3c147d83d82cb71f
prerequisite-patch-id: 983d1efbe060743f5951e474961fa431d886d757
prerequisite-patch-id: 3c78b20c3b9315cd39e0ae9ea1510c6121bf9ca9
--
2.32.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v5 1/2] drm/i915: Use the correct IRQ during resume
2021-07-01 17:36 [PATCH v5 0/2] drm/i915: IRQ fixes Thomas Zimmermann
@ 2021-07-01 17:36 ` Thomas Zimmermann
2021-07-01 17:36 ` [PATCH v5 2/2] drm/i915: Drop all references to DRM IRQ midlayer Thomas Zimmermann
2021-07-02 19:51 ` [PATCH v5 0/2] drm/i915: IRQ fixes Daniel Vetter
2 siblings, 0 replies; 6+ messages in thread
From: Thomas Zimmermann @ 2021-07-01 17:36 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel,
chris, mika.kuoppala, matthew.brost, maarten.lankhorst,
lucas.demarchi, ville.syrjala
Cc: Daniel Vetter, intel-gfx, Thomas Zimmermann, dri-devel
The code in xcs_resume() probably didn't work as intended. It uses
struct drm_device.irq, which is allocated to 0, but never initialized
by i915 to the device's interrupt number.
Change all calls to synchronize_hardirq() to intel_synchronize_irq(),
which uses the correct interrupt. _hardirq() functions are not needed
in this context.
v5:
* go back to _hardirq() after PCI probe reported wrong
context; add rsp comment
v4:
* switch everything to intel_synchronize_irq() (Daniel)
v3:
* also use intel_synchronize_hardirq() at another callsite
v2:
* wrap irq code in intel_synchronize_hardirq() (Ville)
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Fixes: 536f77b1caa0 ("drm/i915/gt: Call stop_ring() from ring resume, again")
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ring_submission.c | 7 +++++--
drivers/gpu/drm/i915/i915_irq.c | 5 +++++
drivers/gpu/drm/i915/i915_irq.h | 1 +
4 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 88694822716a..5ca3d1664335 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1229,7 +1229,7 @@ bool intel_engine_is_idle(struct intel_engine_cs *engine)
return true;
/* Waiting to drain ELSP? */
- synchronize_hardirq(to_pci_dev(engine->i915->drm.dev)->irq);
+ intel_synchronize_hardirq(engine->i915);
intel_engine_flush_submission(engine);
/* ELSP is empty, but there are ready requests? E.g. after reset */
diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
index 5d42a12ef3d6..5c4d204d07cc 100644
--- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
@@ -184,8 +184,11 @@ static int xcs_resume(struct intel_engine_cs *engine)
ENGINE_TRACE(engine, "ring:{HEAD:%04x, TAIL:%04x}\n",
ring->head, ring->tail);
- /* Double check the ring is empty & disabled before we resume */
- synchronize_hardirq(engine->i915->drm.irq);
+ /*
+ * Double check the ring is empty & disabled before we resume. Called
+ * from atomic context during PCI probe, so _hardirq().
+ */
+ intel_synchronize_hardirq(engine->i915);
if (!stop_ring(engine))
goto err;
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7d0ce8b9f8ed..2203dca19895 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -4575,3 +4575,8 @@ void intel_synchronize_irq(struct drm_i915_private *i915)
{
synchronize_irq(to_pci_dev(i915->drm.dev)->irq);
}
+
+void intel_synchronize_hardirq(struct drm_i915_private *i915)
+{
+ synchronize_hardirq(to_pci_dev(i915->drm.dev)->irq);
+}
diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
index db34d5dbe402..e43b6734f21b 100644
--- a/drivers/gpu/drm/i915/i915_irq.h
+++ b/drivers/gpu/drm/i915/i915_irq.h
@@ -94,6 +94,7 @@ void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv);
void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv);
bool intel_irqs_enabled(struct drm_i915_private *dev_priv);
void intel_synchronize_irq(struct drm_i915_private *i915);
+void intel_synchronize_hardirq(struct drm_i915_private *i915);
int intel_get_crtc_scanline(struct intel_crtc *crtc);
void gen8_irq_power_well_post_enable(struct drm_i915_private *dev_priv,
--
2.32.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v5 2/2] drm/i915: Drop all references to DRM IRQ midlayer
2021-07-01 17:36 [PATCH v5 0/2] drm/i915: IRQ fixes Thomas Zimmermann
2021-07-01 17:36 ` [PATCH v5 1/2] drm/i915: Use the correct IRQ during resume Thomas Zimmermann
@ 2021-07-01 17:36 ` Thomas Zimmermann
2021-07-02 19:51 ` [PATCH v5 0/2] drm/i915: IRQ fixes Daniel Vetter
2 siblings, 0 replies; 6+ messages in thread
From: Thomas Zimmermann @ 2021-07-01 17:36 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, airlied, daniel,
chris, mika.kuoppala, matthew.brost, maarten.lankhorst,
lucas.demarchi, ville.syrjala
Cc: intel-gfx, Thomas Zimmermann, dri-devel
Remove all references to DRM's IRQ midlayer. i915 uses Linux' interrupt
functions directly.
v2:
* also remove an outdated comment
* move IRQ fix into separate patch
* update Fixes tag (Daniel)
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Fixes: b318b82455bd ("drm/i915: Nuke drm_driver irq vfuncs")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
---
drivers/gpu/drm/i915/i915_drv.c | 1 -
drivers/gpu/drm/i915/i915_irq.c | 5 -----
2 files changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 62327c15f457..30d8cd8c69b1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -42,7 +42,6 @@
#include <drm/drm_aperture.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_ioctl.h>
-#include <drm/drm_irq.h>
#include <drm/drm_managed.h>
#include <drm/drm_probe_helper.h>
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2203dca19895..1d4c683c9de9 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -33,7 +33,6 @@
#include <linux/sysrq.h>
#include <drm/drm_drv.h>
-#include <drm/drm_irq.h>
#include "display/intel_de.h"
#include "display/intel_display_types.h"
@@ -4564,10 +4563,6 @@ void intel_runtime_pm_enable_interrupts(struct drm_i915_private *dev_priv)
bool intel_irqs_enabled(struct drm_i915_private *dev_priv)
{
- /*
- * We only use drm_irq_uninstall() at unload and VT switch, so
- * this is the only thing we need to check.
- */
return dev_priv->runtime_pm.irqs_enabled;
}
--
2.32.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v5 0/2] drm/i915: IRQ fixes
2021-07-01 17:36 [PATCH v5 0/2] drm/i915: IRQ fixes Thomas Zimmermann
2021-07-01 17:36 ` [PATCH v5 1/2] drm/i915: Use the correct IRQ during resume Thomas Zimmermann
2021-07-01 17:36 ` [PATCH v5 2/2] drm/i915: Drop all references to DRM IRQ midlayer Thomas Zimmermann
@ 2021-07-02 19:51 ` Daniel Vetter
2021-07-03 17:55 ` Thomas Zimmermann
2 siblings, 1 reply; 6+ messages in thread
From: Daniel Vetter @ 2021-07-02 19:51 UTC (permalink / raw)
To: Thomas Zimmermann
Cc: matthew.brost, airlied, mika.kuoppala, intel-gfx, chris,
dri-devel, rodrigo.vivi, lucas.demarchi
On Thu, Jul 01, 2021 at 07:36:16PM +0200, Thomas Zimmermann wrote:
> Fix a bug in the usage of IRQs and cleanup references to the DRM
> IRQ midlayer.
>
> Preferably this patchset would be merged through drm-misc-next.
>
> v5:
> * go back to _hardirq() after CI tests reported atomic
> context in PCI probe; add rsp comment
> v4:
> * switch IRQ code to intel_synchronize_irq() (Daniel)
> v3:
> * also use intel_synchronize_hardirq() from other callsite
> v2:
> * split patch
> * also fix comment
> * add intel_synchronize_hardirq() (Ville)
> * update Fixes tag (Daniel)
Ok now I actually pushed the right patch set.
-Daniel
>
> Thomas Zimmermann (2):
> drm/i915: Use the correct IRQ during resume
> drm/i915: Drop all references to DRM IRQ midlayer
>
> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
> drivers/gpu/drm/i915/gt/intel_ring_submission.c | 7 +++++--
> drivers/gpu/drm/i915/i915_drv.c | 1 -
> drivers/gpu/drm/i915/i915_irq.c | 10 +++++-----
> drivers/gpu/drm/i915/i915_irq.h | 1 +
> 5 files changed, 12 insertions(+), 9 deletions(-)
>
>
> base-commit: 67f5a18128770817e4218a9e496d2bf5047c51e8
> prerequisite-patch-id: c2b2f08f0eccc9f5df0c0da49fa1d36267deb11d
> prerequisite-patch-id: c67e5d886a47b7d0266d81100837557fda34cb24
> prerequisite-patch-id: 0cca17365e65370fa95d193ed2f1c88917ee1aef
> prerequisite-patch-id: 12b9894350a0b56579d29542943465ef5134751c
> prerequisite-patch-id: 3e1c37d3425f4820fe36ea3da57c65e166fe0ee5
> prerequisite-patch-id: 1017c860a0bf95ce370d82b8db1745f5548fb321
> prerequisite-patch-id: dcc022baab7c172978de9809702c2f4f54323047
> prerequisite-patch-id: 0d05ee247042b43d5ab8f3af216e708a8e09bee8
> prerequisite-patch-id: 110c411161bed6072c32185940fcd052d0bdb09a
> prerequisite-patch-id: d2d1aeccffdfadf2b951487b8605f59c795d84cf
> prerequisite-patch-id: 85fe31e27ca13adc0d1bcc7c19b1ce238a77ee6a
> prerequisite-patch-id: c61fdacbe035ba5c17f1ff393bc9087f16aaea7b
> prerequisite-patch-id: c4821af5dbba4d121769f1da85d91fbb53020ec0
> prerequisite-patch-id: 0b20ef3302abfe6dc123dbc54b9dd087865f935b
> prerequisite-patch-id: d34eb96cbbdeb91870ace4250ea75920b1653dc2
> prerequisite-patch-id: 7f64fce347d15232134d7636ca7a8d9f5bf1a3a0
> prerequisite-patch-id: c83be7a285eb6682cdae0df401ab5d4c208f036b
> prerequisite-patch-id: eb1a44d2eb2685cea154dd3f17f5f463dfafd39a
> prerequisite-patch-id: 92a8c37dae4b8394fd6702f4af58ac7815ac3069
> prerequisite-patch-id: f0237988fe4ae6eba143432d1ace8beb52d935f8
> prerequisite-patch-id: bcf4d29437ed7cb78225dec4c99249eb40c18302
> prerequisite-patch-id: 6407b4c7f1b80af8d329d5f796b30da11959e936
> prerequisite-patch-id: 4a69e6e49d691b555f0e0874d638cd204dcb0c48
> prerequisite-patch-id: be09cfa8a67dd435a25103b85bd4b1649c5190a3
> prerequisite-patch-id: 813ecc9f94251c3d669155faf64c0c9e6a458393
> prerequisite-patch-id: beb2b5000a1682cbd74a7e2ab1566fcae5bccbf0
> prerequisite-patch-id: 754c8878611864475a0b75fd49ff38e71a21c795
> prerequisite-patch-id: d7d4bac3c19f94ba9593143b3c147d83d82cb71f
> prerequisite-patch-id: 983d1efbe060743f5951e474961fa431d886d757
> prerequisite-patch-id: 3c78b20c3b9315cd39e0ae9ea1510c6121bf9ca9
> --
> 2.32.0
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v5 0/2] drm/i915: IRQ fixes
2021-07-02 19:51 ` [PATCH v5 0/2] drm/i915: IRQ fixes Daniel Vetter
@ 2021-07-03 17:55 ` Thomas Zimmermann
2021-07-06 8:13 ` Daniel Vetter
0 siblings, 1 reply; 6+ messages in thread
From: Thomas Zimmermann @ 2021-07-03 17:55 UTC (permalink / raw)
To: Daniel Vetter
Cc: matthew.brost, airlied, mika.kuoppala, intel-gfx, chris,
dri-devel, rodrigo.vivi, lucas.demarchi
[-- Attachment #1.1: Type: text/plain, Size: 3967 bytes --]
Hi
Am 02.07.21 um 21:51 schrieb Daniel Vetter:
> On Thu, Jul 01, 2021 at 07:36:16PM +0200, Thomas Zimmermann wrote:
>> Fix a bug in the usage of IRQs and cleanup references to the DRM
>> IRQ midlayer.
>>
>> Preferably this patchset would be merged through drm-misc-next.
>>
>> v5:
>> * go back to _hardirq() after CI tests reported atomic
>> context in PCI probe; add rsp comment
>> v4:
>> * switch IRQ code to intel_synchronize_irq() (Daniel)
>> v3:
>> * also use intel_synchronize_hardirq() from other callsite
>> v2:
>> * split patch
>> * also fix comment
>> * add intel_synchronize_hardirq() (Ville)
>> * update Fixes tag (Daniel)
>
> Ok now I actually pushed the right patch set.
Oh, I messed up. I forgot to reset the commit message in patch 1 v5.
It's for v4 and contains the opposite of what's actually happening.
Is it too late to fix this? If you can force-push into the branch, maybe
simply replace the current message with the one for v3. [1]
Best regards
Thomas
[1] https://patchwork.freedesktop.org/patch/441954/?series=92054&rev=2
> -Daniel
>
>>
>> Thomas Zimmermann (2):
>> drm/i915: Use the correct IRQ during resume
>> drm/i915: Drop all references to DRM IRQ midlayer
>>
>> drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
>> drivers/gpu/drm/i915/gt/intel_ring_submission.c | 7 +++++--
>> drivers/gpu/drm/i915/i915_drv.c | 1 -
>> drivers/gpu/drm/i915/i915_irq.c | 10 +++++-----
>> drivers/gpu/drm/i915/i915_irq.h | 1 +
>> 5 files changed, 12 insertions(+), 9 deletions(-)
>>
>>
>> base-commit: 67f5a18128770817e4218a9e496d2bf5047c51e8
>> prerequisite-patch-id: c2b2f08f0eccc9f5df0c0da49fa1d36267deb11d
>> prerequisite-patch-id: c67e5d886a47b7d0266d81100837557fda34cb24
>> prerequisite-patch-id: 0cca17365e65370fa95d193ed2f1c88917ee1aef
>> prerequisite-patch-id: 12b9894350a0b56579d29542943465ef5134751c
>> prerequisite-patch-id: 3e1c37d3425f4820fe36ea3da57c65e166fe0ee5
>> prerequisite-patch-id: 1017c860a0bf95ce370d82b8db1745f5548fb321
>> prerequisite-patch-id: dcc022baab7c172978de9809702c2f4f54323047
>> prerequisite-patch-id: 0d05ee247042b43d5ab8f3af216e708a8e09bee8
>> prerequisite-patch-id: 110c411161bed6072c32185940fcd052d0bdb09a
>> prerequisite-patch-id: d2d1aeccffdfadf2b951487b8605f59c795d84cf
>> prerequisite-patch-id: 85fe31e27ca13adc0d1bcc7c19b1ce238a77ee6a
>> prerequisite-patch-id: c61fdacbe035ba5c17f1ff393bc9087f16aaea7b
>> prerequisite-patch-id: c4821af5dbba4d121769f1da85d91fbb53020ec0
>> prerequisite-patch-id: 0b20ef3302abfe6dc123dbc54b9dd087865f935b
>> prerequisite-patch-id: d34eb96cbbdeb91870ace4250ea75920b1653dc2
>> prerequisite-patch-id: 7f64fce347d15232134d7636ca7a8d9f5bf1a3a0
>> prerequisite-patch-id: c83be7a285eb6682cdae0df401ab5d4c208f036b
>> prerequisite-patch-id: eb1a44d2eb2685cea154dd3f17f5f463dfafd39a
>> prerequisite-patch-id: 92a8c37dae4b8394fd6702f4af58ac7815ac3069
>> prerequisite-patch-id: f0237988fe4ae6eba143432d1ace8beb52d935f8
>> prerequisite-patch-id: bcf4d29437ed7cb78225dec4c99249eb40c18302
>> prerequisite-patch-id: 6407b4c7f1b80af8d329d5f796b30da11959e936
>> prerequisite-patch-id: 4a69e6e49d691b555f0e0874d638cd204dcb0c48
>> prerequisite-patch-id: be09cfa8a67dd435a25103b85bd4b1649c5190a3
>> prerequisite-patch-id: 813ecc9f94251c3d669155faf64c0c9e6a458393
>> prerequisite-patch-id: beb2b5000a1682cbd74a7e2ab1566fcae5bccbf0
>> prerequisite-patch-id: 754c8878611864475a0b75fd49ff38e71a21c795
>> prerequisite-patch-id: d7d4bac3c19f94ba9593143b3c147d83d82cb71f
>> prerequisite-patch-id: 983d1efbe060743f5951e474961fa431d886d757
>> prerequisite-patch-id: 3c78b20c3b9315cd39e0ae9ea1510c6121bf9ca9
>> --
>> 2.32.0
>>
>
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Maxfeldstr. 5, 90409 Nürnberg, Germany
(HRB 36809, AG Nürnberg)
Geschäftsführer: Felix Imendörffer
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v5 0/2] drm/i915: IRQ fixes
2021-07-03 17:55 ` Thomas Zimmermann
@ 2021-07-06 8:13 ` Daniel Vetter
0 siblings, 0 replies; 6+ messages in thread
From: Daniel Vetter @ 2021-07-06 8:13 UTC (permalink / raw)
To: Thomas Zimmermann
Cc: matthew.brost, airlied, mika.kuoppala, intel-gfx, chris,
dri-devel, rodrigo.vivi, lucas.demarchi
On Sat, Jul 03, 2021 at 07:55:31PM +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 02.07.21 um 21:51 schrieb Daniel Vetter:
> > On Thu, Jul 01, 2021 at 07:36:16PM +0200, Thomas Zimmermann wrote:
> > > Fix a bug in the usage of IRQs and cleanup references to the DRM
> > > IRQ midlayer.
> > >
> > > Preferably this patchset would be merged through drm-misc-next.
> > >
> > > v5:
> > > * go back to _hardirq() after CI tests reported atomic
> > > context in PCI probe; add rsp comment
> > > v4:
> > > * switch IRQ code to intel_synchronize_irq() (Daniel)
> > > v3:
> > > * also use intel_synchronize_hardirq() from other callsite
> > > v2:
> > > * split patch
> > > * also fix comment
> > > * add intel_synchronize_hardirq() (Ville)
> > > * update Fixes tag (Daniel)
> >
> > Ok now I actually pushed the right patch set.
>
> Oh, I messed up. I forgot to reset the commit message in patch 1 v5. It's
> for v4 and contains the opposite of what's actually happening.
>
> Is it too late to fix this? If you can force-push into the branch, maybe
> simply replace the current message with the one for v3. [1]
I already had to do a Fri-late-evening force push to fix my original
mistake right after I pushed it. Now there's other stuff there, so too
late unfortunately :-/
Anyway, not the worst screw-up and the Link: tag at least will point to
this discussion here.
-Daniel
>
> Best regards
> Thomas
>
> [1] https://patchwork.freedesktop.org/patch/441954/?series=92054&rev=2
>
> > -Daniel
> >
> > >
> > > Thomas Zimmermann (2):
> > > drm/i915: Use the correct IRQ during resume
> > > drm/i915: Drop all references to DRM IRQ midlayer
> > >
> > > drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
> > > drivers/gpu/drm/i915/gt/intel_ring_submission.c | 7 +++++--
> > > drivers/gpu/drm/i915/i915_drv.c | 1 -
> > > drivers/gpu/drm/i915/i915_irq.c | 10 +++++-----
> > > drivers/gpu/drm/i915/i915_irq.h | 1 +
> > > 5 files changed, 12 insertions(+), 9 deletions(-)
> > >
> > >
> > > base-commit: 67f5a18128770817e4218a9e496d2bf5047c51e8
> > > prerequisite-patch-id: c2b2f08f0eccc9f5df0c0da49fa1d36267deb11d
> > > prerequisite-patch-id: c67e5d886a47b7d0266d81100837557fda34cb24
> > > prerequisite-patch-id: 0cca17365e65370fa95d193ed2f1c88917ee1aef
> > > prerequisite-patch-id: 12b9894350a0b56579d29542943465ef5134751c
> > > prerequisite-patch-id: 3e1c37d3425f4820fe36ea3da57c65e166fe0ee5
> > > prerequisite-patch-id: 1017c860a0bf95ce370d82b8db1745f5548fb321
> > > prerequisite-patch-id: dcc022baab7c172978de9809702c2f4f54323047
> > > prerequisite-patch-id: 0d05ee247042b43d5ab8f3af216e708a8e09bee8
> > > prerequisite-patch-id: 110c411161bed6072c32185940fcd052d0bdb09a
> > > prerequisite-patch-id: d2d1aeccffdfadf2b951487b8605f59c795d84cf
> > > prerequisite-patch-id: 85fe31e27ca13adc0d1bcc7c19b1ce238a77ee6a
> > > prerequisite-patch-id: c61fdacbe035ba5c17f1ff393bc9087f16aaea7b
> > > prerequisite-patch-id: c4821af5dbba4d121769f1da85d91fbb53020ec0
> > > prerequisite-patch-id: 0b20ef3302abfe6dc123dbc54b9dd087865f935b
> > > prerequisite-patch-id: d34eb96cbbdeb91870ace4250ea75920b1653dc2
> > > prerequisite-patch-id: 7f64fce347d15232134d7636ca7a8d9f5bf1a3a0
> > > prerequisite-patch-id: c83be7a285eb6682cdae0df401ab5d4c208f036b
> > > prerequisite-patch-id: eb1a44d2eb2685cea154dd3f17f5f463dfafd39a
> > > prerequisite-patch-id: 92a8c37dae4b8394fd6702f4af58ac7815ac3069
> > > prerequisite-patch-id: f0237988fe4ae6eba143432d1ace8beb52d935f8
> > > prerequisite-patch-id: bcf4d29437ed7cb78225dec4c99249eb40c18302
> > > prerequisite-patch-id: 6407b4c7f1b80af8d329d5f796b30da11959e936
> > > prerequisite-patch-id: 4a69e6e49d691b555f0e0874d638cd204dcb0c48
> > > prerequisite-patch-id: be09cfa8a67dd435a25103b85bd4b1649c5190a3
> > > prerequisite-patch-id: 813ecc9f94251c3d669155faf64c0c9e6a458393
> > > prerequisite-patch-id: beb2b5000a1682cbd74a7e2ab1566fcae5bccbf0
> > > prerequisite-patch-id: 754c8878611864475a0b75fd49ff38e71a21c795
> > > prerequisite-patch-id: d7d4bac3c19f94ba9593143b3c147d83d82cb71f
> > > prerequisite-patch-id: 983d1efbe060743f5951e474961fa431d886d757
> > > prerequisite-patch-id: 3c78b20c3b9315cd39e0ae9ea1510c6121bf9ca9
> > > --
> > > 2.32.0
> > >
> >
>
> --
> Thomas Zimmermann
> Graphics Driver Developer
> SUSE Software Solutions Germany GmbH
> Maxfeldstr. 5, 90409 Nürnberg, Germany
> (HRB 36809, AG Nürnberg)
> Geschäftsführer: Felix Imendörffer
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 6+ messages in thread
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2021-07-01 17:36 [PATCH v5 0/2] drm/i915: IRQ fixes Thomas Zimmermann
2021-07-01 17:36 ` [PATCH v5 1/2] drm/i915: Use the correct IRQ during resume Thomas Zimmermann
2021-07-01 17:36 ` [PATCH v5 2/2] drm/i915: Drop all references to DRM IRQ midlayer Thomas Zimmermann
2021-07-02 19:51 ` [PATCH v5 0/2] drm/i915: IRQ fixes Daniel Vetter
2021-07-03 17:55 ` Thomas Zimmermann
2021-07-06 8:13 ` Daniel Vetter
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