* [PATCH] drm/msm/dpu: populate wb or intf before reset_intf_cfg
@ 2022-07-15 19:14 Abhinav Kumar
2022-07-20 15:53 ` Jessica Zhang
2022-08-26 9:09 ` Dmitry Baryshkov
0 siblings, 2 replies; 3+ messages in thread
From: Abhinav Kumar @ 2022-07-15 19:14 UTC (permalink / raw)
To: freedreno
Cc: Abhinav Kumar, dri-devel, swboyd, seanpaul, dmitry.baryshkov,
quic_jesszhan, quic_aravindh
dpu_encoder_helper_phys_cleanup() was not populating neither
wb or intf to the intf_cfg before calling the reset_intf_cfg().
This causes the reset of the active bits of wb/intf to be
skipped which is incorrect.
Fix this by populating the relevant wb or intf indices correctly.
Fixes: ae4d721ce100 ("drm/msm/dpu: add an API to reset the encoder related hw blocks")
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index c682d4e02d1b..52a626117f70 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -2061,6 +2061,12 @@ void dpu_encoder_helper_phys_cleanup(struct dpu_encoder_phys *phys_enc)
intf_cfg.stream_sel = 0; /* Don't care value for video mode */
intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc);
+
+ if (phys_enc->hw_intf)
+ intf_cfg.intf = phys_enc->hw_intf->idx;
+ if (phys_enc->hw_wb)
+ intf_cfg.wb = phys_enc->hw_wb->idx;
+
if (phys_enc->hw_pp->merge_3d)
intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx;
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/msm/dpu: populate wb or intf before reset_intf_cfg
2022-07-15 19:14 [PATCH] drm/msm/dpu: populate wb or intf before reset_intf_cfg Abhinav Kumar
@ 2022-07-20 15:53 ` Jessica Zhang
2022-08-26 9:09 ` Dmitry Baryshkov
1 sibling, 0 replies; 3+ messages in thread
From: Jessica Zhang @ 2022-07-20 15:53 UTC (permalink / raw)
To: Abhinav Kumar, freedreno
Cc: dri-devel, swboyd, seanpaul, dmitry.baryshkov, quic_aravindh
On 7/15/2022 12:14 PM, Abhinav Kumar wrote:
> dpu_encoder_helper_phys_cleanup() was not populating neither
> wb or intf to the intf_cfg before calling the reset_intf_cfg().
>
> This causes the reset of the active bits of wb/intf to be
> skipped which is incorrect.
>
> Fix this by populating the relevant wb or intf indices correctly.
>
> Fixes: ae4d721ce100 ("drm/msm/dpu: add an API to reset the encoder related hw blocks")
> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Tested-by: Jessica Zhang <quic_jesszhan@quicinc.com> # Trogdor (SC8170)
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index c682d4e02d1b..52a626117f70 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -2061,6 +2061,12 @@ void dpu_encoder_helper_phys_cleanup(struct dpu_encoder_phys *phys_enc)
>
> intf_cfg.stream_sel = 0; /* Don't care value for video mode */
> intf_cfg.mode_3d = dpu_encoder_helper_get_3d_blend_mode(phys_enc);
> +
> + if (phys_enc->hw_intf)
> + intf_cfg.intf = phys_enc->hw_intf->idx;
> + if (phys_enc->hw_wb)
> + intf_cfg.wb = phys_enc->hw_wb->idx;
> +
> if (phys_enc->hw_pp->merge_3d)
> intf_cfg.merge_3d = phys_enc->hw_pp->merge_3d->idx;
>
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/msm/dpu: populate wb or intf before reset_intf_cfg
2022-07-15 19:14 [PATCH] drm/msm/dpu: populate wb or intf before reset_intf_cfg Abhinav Kumar
2022-07-20 15:53 ` Jessica Zhang
@ 2022-08-26 9:09 ` Dmitry Baryshkov
1 sibling, 0 replies; 3+ messages in thread
From: Dmitry Baryshkov @ 2022-08-26 9:09 UTC (permalink / raw)
To: Abhinav Kumar, freedreno
Cc: dri-devel, swboyd, seanpaul, quic_jesszhan, quic_aravindh
On 15/07/2022 22:14, Abhinav Kumar wrote:
> dpu_encoder_helper_phys_cleanup() was not populating neither
> wb or intf to the intf_cfg before calling the reset_intf_cfg().
>
> This causes the reset of the active bits of wb/intf to be
> skipped which is incorrect.
>
> Fix this by populating the relevant wb or intf indices correctly.
>
> Fixes: ae4d721ce100 ("drm/msm/dpu: add an API to reset the encoder related hw blocks")
> Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 3+ messages in thread
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2022-07-15 19:14 [PATCH] drm/msm/dpu: populate wb or intf before reset_intf_cfg Abhinav Kumar
2022-07-20 15:53 ` Jessica Zhang
2022-08-26 9:09 ` Dmitry Baryshkov
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