From mboxrd@z Thu Jan 1 00:00:00 1970 From: Philippe CORNU Subject: Re: [PATCH] drm/panel: otm8009a: set clock to 29.70 Mhz Date: Tue, 26 Mar 2019 12:50:24 +0000 Message-ID: References: <1553155646-13636-1-git-send-email-yannick.fertre@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1553155646-13636-1-git-send-email-yannick.fertre@st.com> Content-Language: en-US Content-ID: Sender: linux-kernel-owner@vger.kernel.org To: Yannick FERTRE , Thierry Reding , David Airlie , Daniel Vetter , "dri-devel@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "linux-stm32@st-md-mailman.stormreply.com" List-Id: dri-devel@lists.freedesktop.org RGVhciBZYW5uaWNrLA0KTWFueSB0aGFua3MgZm9yIHlvdXIgcGF0Y2guDQoNClJldmlld2VkLWJ5 OiBQaGlsaXBwZSBDb3JudSA8cGhpbGlwcGUuY29ybnVAc3QuY29tPg0KVGVzdGVkLWJ5OiBQaGls aXBwZSBDb3JudSA8cGhpbGlwcGUuY29ybnVAc3QuY29tPg0KDQpQaGlsaXBwZSA6LSkNCg0KDQpP biAzLzIxLzE5IDk6MDcgQU0sIFlhbm5pY2sgRmVydHLDqSB3cm90ZToNCj4gVGhlIHBhbmVsIGRv ZXMgbm90IHN1cHBvcnQgY2xvY2sgZnJlcXVlbmN5IG92ZXIgMzAuNzQgTWh6Lg0KPiBUaGUgY2xv Y2sgcmF0ZSBoYXMgYmVlbiByZWR1Y2VkIHRvIDI5LjcwIE1oeiAmIG5ldyB0aW1pbmdzIGhhdmUN Cj4gYmVlbiBjb21wdXRlZCB0byBnZXQgYSBmcmFtZXJhdGUgb2YgNTBmcHMuDQo+IA0KPiBTaWdu ZWQtb2ZmLWJ5OiBZYW5uaWNrIEZlcnRyw6kgPHlhbm5pY2suZmVydHJlQHN0LmNvbT4NCj4gLS0t DQo+ICAgZHJpdmVycy9ncHUvZHJtL3BhbmVsL3BhbmVsLW9yaXNldGVjaC1vdG04MDA5YS5jIHwg MTQgKysrKysrKy0tLS0tLS0NCj4gICAxIGZpbGUgY2hhbmdlZCwgNyBpbnNlcnRpb25zKCspLCA3 IGRlbGV0aW9ucygtKQ0KPiANCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9wYW5lbC9w YW5lbC1vcmlzZXRlY2gtb3RtODAwOWEuYyBiL2RyaXZlcnMvZ3B1L2RybS9wYW5lbC9wYW5lbC1v cmlzZXRlY2gtb3RtODAwOWEuYw0KPiBpbmRleCA4N2ZhMzE2Li5mNzE1YmJlIDEwMDY0NA0KPiAt LS0gYS9kcml2ZXJzL2dwdS9kcm0vcGFuZWwvcGFuZWwtb3Jpc2V0ZWNoLW90bTgwMDlhLmMNCj4g KysrIGIvZHJpdmVycy9ncHUvZHJtL3BhbmVsL3BhbmVsLW9yaXNldGVjaC1vdG04MDA5YS5jDQo+ IEBAIC02NywxNSArNjcsMTUgQEAgc3RydWN0IG90bTgwMDlhIHsNCj4gICB9Ow0KPiAgIA0KPiAg IHN0YXRpYyBjb25zdCBzdHJ1Y3QgZHJtX2Rpc3BsYXlfbW9kZSBkZWZhdWx0X21vZGUgPSB7DQo+ IC0JLmNsb2NrID0gMzI3MjksDQo+ICsJLmNsb2NrID0gMjk3MDAsDQo+ICAgCS5oZGlzcGxheSA9 IDQ4MCwNCj4gLQkuaHN5bmNfc3RhcnQgPSA0ODAgKyAxMjAsDQo+IC0JLmhzeW5jX2VuZCA9IDQ4 MCArIDEyMCArIDYzLA0KPiAtCS5odG90YWwgPSA0ODAgKyAxMjAgKyA2MyArIDEyMCwNCj4gKwku aHN5bmNfc3RhcnQgPSA0ODAgKyA5OCwNCj4gKwkuaHN5bmNfZW5kID0gNDgwICsgOTggKyAzMiwN Cj4gKwkuaHRvdGFsID0gNDgwICsgOTggKyAzMiArIDk4LA0KPiAgIAkudmRpc3BsYXkgPSA4MDAs DQo+IC0JLnZzeW5jX3N0YXJ0ID0gODAwICsgMTIsDQo+IC0JLnZzeW5jX2VuZCA9IDgwMCArIDEy ICsgMTIsDQo+IC0JLnZ0b3RhbCA9IDgwMCArIDEyICsgMTIgKyAxMiwNCj4gKwkudnN5bmNfc3Rh cnQgPSA4MDAgKyAxNSwNCj4gKwkudnN5bmNfZW5kID0gODAwICsgMTUgKyAxMCwNCj4gKwkudnRv dGFsID0gODAwICsgMTUgKyAxMCArIDE0LA0KPiAgIAkudnJlZnJlc2ggPSA1MCwNCj4gICAJLmZs YWdzID0gMCwNCj4gICAJLndpZHRoX21tID0gNTIsDQo+IA==