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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; Received: from SATLEXMB03.amd.com (165.204.84.17) by BN8NAM11FT042.mail.protection.outlook.com (10.13.177.85) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4844.14 via Frontend Transport; Tue, 4 Jan 2022 09:08:04 +0000 Received: from [10.65.96.204] (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 4 Jan 2022 03:07:59 -0600 Subject: Re: [RFC v2 8/8] drm/amd/virt: Drop concurrent GPU reset protection for SRIOV To: =?UTF-8?Q?Christian_K=c3=b6nig?= , Andrey Grodzovsky , "Deng, Emily" , "Liu, Monk" , "Koenig, Christian" , "dri-devel@lists.freedesktop.org" , "amd-gfx@lists.freedesktop.org" , "Chen, Horace" , "Chen, JingWen" References: <20211222220506.789133-1-andrey.grodzovsky@amd.com> <20211222221400.790842-1-andrey.grodzovsky@amd.com> <20211222221400.790842-4-andrey.grodzovsky@amd.com> <9125ac3a-e578-6b34-1533-7622ec0274f1@amd.com> <2dee6f65-9ca9-a332-7206-f24021fb4c44@gmail.com> From: JingWen Chen Message-ID: Date: Tue, 4 Jan 2022 17:07:42 +0800 User-Agent: Mozilla/5.0 (X11; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB03.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(4636009)(46966006)(40470700002)(36840700001)(110136005)(83380400001)(921005)(8936002)(66574015)(8676002)(26005)(6666004)(40460700001)(316002)(336012)(6636002)(4326008)(5660300002)(426003)(82310400004)(36860700001)(16526019)(31696002)(16576012)(186003)(31686004)(70206006)(2616005)(356005)(70586007)(47076005)(53546011)(2906002)(36756003)(4001150100001)(508600001)(81166007)(36900700001)(43740500002); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jan 2022 09:08:04.4944 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 09d1b4fb-4fbf-4902-4b0f-08d9cf61b767 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT042.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB5449 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Hi Christian, I'm not sure what do you mean by "we need to change SRIOV not the driver". Do you mean we should change the reset sequence in SRIOV? This will be a huge change for our SRIOV solution. >From my point of view, we can directly use amdgpu_device_lock_adev and amdgpu_device_unlock_adev in flr_work instead of try_lock since no one will conflict with this thread with reset_domain introduced. But we do need the reset_sem and adev->in_gpu_reset to keep device untouched via user space. Best Regards, Jingwen Chen On 2022/1/3 下午6:17, Christian König wrote: > Please don't. This patch is vital to the cleanup of the reset procedure. > > If SRIOV doesn't work with that we need to change SRIOV and not the driver. > > Christian. > > Am 30.12.21 um 19:45 schrieb Andrey Grodzovsky: >> Sure, I guess i can drop this patch then. >> >> Andrey >> >> On 2021-12-24 4:57 a.m., JingWen Chen wrote: >>> I do agree with shaoyun, if the host find the gpu engine hangs first, and do the flr, guest side thread may not know this and still try to access HW(e.g. kfd is using a lot of amdgpu_in_reset and reset_sem to identify the reset status). And this may lead to very bad result. >>> >>> On 2021/12/24 下午4:58, Deng, Emily wrote: >>>> These patches look good to me. JingWen will pull these patches and do some basic TDR test on sriov environment, and give feedback. >>>> >>>> Best wishes >>>> Emily Deng >>>> >>>> >>>> >>>>> -----Original Message----- >>>>> From: Liu, Monk >>>>> Sent: Thursday, December 23, 2021 6:14 PM >>>>> To: Koenig, Christian ; Grodzovsky, Andrey >>>>> ; dri-devel@lists.freedesktop.org; amd- >>>>> gfx@lists.freedesktop.org; Chen, Horace ; Chen, >>>>> JingWen ; Deng, Emily >>>>> Cc: daniel@ffwll.ch >>>>> Subject: RE: [RFC v2 8/8] drm/amd/virt: Drop concurrent GPU reset protection >>>>> for SRIOV >>>>> >>>>> [AMD Official Use Only] >>>>> >>>>> @Chen, Horace @Chen, JingWen @Deng, Emily >>>>> >>>>> Please take a review on Andrey's patch >>>>> >>>>> Thanks >>>>> ------------------------------------------------------------------- >>>>> Monk Liu | Cloud GPU & Virtualization Solution | AMD >>>>> ------------------------------------------------------------------- >>>>> we are hiring software manager for CVS core team >>>>> ------------------------------------------------------------------- >>>>> >>>>> -----Original Message----- >>>>> From: Koenig, Christian >>>>> Sent: Thursday, December 23, 2021 4:42 PM >>>>> To: Grodzovsky, Andrey ; dri- >>>>> devel@lists.freedesktop.org; amd-gfx@lists.freedesktop.org >>>>> Cc: daniel@ffwll.ch; Liu, Monk ; Chen, Horace >>>>> >>>>> Subject: Re: [RFC v2 8/8] drm/amd/virt: Drop concurrent GPU reset protection >>>>> for SRIOV >>>>> >>>>> Am 22.12.21 um 23:14 schrieb Andrey Grodzovsky: >>>>>> Since now flr work is serialized against  GPU resets there is no need >>>>>> for this. >>>>>> >>>>>> Signed-off-by: Andrey Grodzovsky >>>>> Acked-by: Christian König >>>>> >>>>>> --- >>>>>>    drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c | 11 ----------- >>>>>>    drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c | 11 ----------- >>>>>>    2 files changed, 22 deletions(-) >>>>>> >>>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c >>>>>> b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c >>>>>> index 487cd654b69e..7d59a66e3988 100644 >>>>>> --- a/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c >>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_ai.c >>>>>> @@ -248,15 +248,7 @@ static void xgpu_ai_mailbox_flr_work(struct >>>>> work_struct *work) >>>>>>        struct amdgpu_device *adev = container_of(virt, struct >>>>> amdgpu_device, virt); >>>>>>        int timeout = AI_MAILBOX_POLL_FLR_TIMEDOUT; >>>>>> >>>>>> -    /* block amdgpu_gpu_recover till msg FLR COMPLETE received, >>>>>> -     * otherwise the mailbox msg will be ruined/reseted by >>>>>> -     * the VF FLR. >>>>>> -     */ >>>>>> -    if (!down_write_trylock(&adev->reset_sem)) >>>>>> -        return; >>>>>> - >>>>>>        amdgpu_virt_fini_data_exchange(adev); >>>>>> -    atomic_set(&adev->in_gpu_reset, 1); >>>>>> >>>>>>        xgpu_ai_mailbox_trans_msg(adev, IDH_READY_TO_RESET, 0, 0, 0); >>>>>> >>>>>> @@ -269,9 +261,6 @@ static void xgpu_ai_mailbox_flr_work(struct >>>>> work_struct *work) >>>>>>        } while (timeout > 1); >>>>>> >>>>>>    flr_done: >>>>>> -    atomic_set(&adev->in_gpu_reset, 0); >>>>>> -    up_write(&adev->reset_sem); >>>>>> - >>>>>>        /* Trigger recovery for world switch failure if no TDR */ >>>>>>        if (amdgpu_device_should_recover_gpu(adev) >>>>>>            && (!amdgpu_device_has_job_running(adev) || diff --git >>>>>> a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c >>>>>> b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c >>>>>> index e3869067a31d..f82c066c8e8d 100644 >>>>>> --- a/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c >>>>>> +++ b/drivers/gpu/drm/amd/amdgpu/mxgpu_nv.c >>>>>> @@ -277,15 +277,7 @@ static void xgpu_nv_mailbox_flr_work(struct >>>>> work_struct *work) >>>>>>        struct amdgpu_device *adev = container_of(virt, struct >>>>> amdgpu_device, virt); >>>>>>        int timeout = NV_MAILBOX_POLL_FLR_TIMEDOUT; >>>>>> >>>>>> -    /* block amdgpu_gpu_recover till msg FLR COMPLETE received, >>>>>> -     * otherwise the mailbox msg will be ruined/reseted by >>>>>> -     * the VF FLR. >>>>>> -     */ >>>>>> -    if (!down_write_trylock(&adev->reset_sem)) >>>>>> -        return; >>>>>> - >>>>>>        amdgpu_virt_fini_data_exchange(adev); >>>>>> -    atomic_set(&adev->in_gpu_reset, 1); >>>>>> >>>>>>        xgpu_nv_mailbox_trans_msg(adev, IDH_READY_TO_RESET, 0, 0, 0); >>>>>> >>>>>> @@ -298,9 +290,6 @@ static void xgpu_nv_mailbox_flr_work(struct >>>>> work_struct *work) >>>>>>        } while (timeout > 1); >>>>>> >>>>>>    flr_done: >>>>>> -    atomic_set(&adev->in_gpu_reset, 0); >>>>>> -    up_write(&adev->reset_sem); >>>>>> - >>>>>>        /* Trigger recovery for world switch failure if no TDR */ >>>>>>        if (amdgpu_device_should_recover_gpu(adev) >>>>>>            && (!amdgpu_device_has_job_running(adev) || >