* [PATCH 1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec
@ 2021-04-21 22:02 José Roberto de Souza
2021-04-22 11:00 ` Mun, Gwan-gyeong
0 siblings, 1 reply; 4+ messages in thread
From: José Roberto de Souza @ 2021-04-21 22:02 UTC (permalink / raw)
To: intel-gfx
Cc: Jani Nikula, Gwan-gyeong Mun, José Roberto de Souza,
dri-devel, Rodrigo Vivi
DP_PSR_EN_CFG bit 5 aka "Selective Update Region Scan Line Capture
Indication" in eDP spec has a ambiguous name, so renaming to better
match specification.
While at it, replacing bit shit by BIT() macro and adding the version
some registers were added to eDP specification.
Cc: <dri-devel@lists.freedesktop.org>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
include/drm/drm_dp_helper.h | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 1e85c2021f2f..d6f6a084a190 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -687,14 +687,14 @@ struct drm_device;
#define DP_DSC_ENABLE 0x160 /* DP 1.4 */
# define DP_DECOMPRESSION_EN (1 << 0)
-#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */
-# define DP_PSR_ENABLE (1 << 0)
-# define DP_PSR_MAIN_LINK_ACTIVE (1 << 1)
-# define DP_PSR_CRC_VERIFICATION (1 << 2)
-# define DP_PSR_FRAME_CAPTURE (1 << 3)
-# define DP_PSR_SELECTIVE_UPDATE (1 << 4)
-# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS (1 << 5)
-# define DP_PSR_ENABLE_PSR2 (1 << 6) /* eDP 1.4a */
+#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */
+# define DP_PSR_ENABLE BIT(0)
+# define DP_PSR_MAIN_LINK_ACTIVE BIT(1)
+# define DP_PSR_CRC_VERIFICATION BIT(2)
+# define DP_PSR_FRAME_CAPTURE BIT(3)
+# define DP_PSR_SU_REGION_SCANLINE_CAPTURE BIT(4) /* eDP 1.4a */
+# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS BIT(5) /* eDP 1.4a */
+# define DP_PSR_ENABLE_PSR2 BIT(6) /* eDP 1.4a */
#define DP_ADAPTER_CTRL 0x1a0
# define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE (1 << 0)
--
2.31.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec
2021-04-21 22:02 [PATCH 1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec José Roberto de Souza
@ 2021-04-22 11:00 ` Mun, Gwan-gyeong
2021-04-23 10:25 ` [Intel-gfx] " Maarten Lankhorst
0 siblings, 1 reply; 4+ messages in thread
From: Mun, Gwan-gyeong @ 2021-04-22 11:00 UTC (permalink / raw)
To: intel-gfx, Souza, Jose; +Cc: Nikula, Jani, dri-devel, Vivi, Rodrigo
The changed name looks more accurate to the edp 1.4b spec.
Looks good to me.
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
On Wed, 2021-04-21 at 15:02 -0700, José Roberto de Souza wrote:
> DP_PSR_EN_CFG bit 5 aka "Selective Update Region Scan Line Capture
> Indication" in eDP spec has a ambiguous name, so renaming to better
> match specification.
>
> While at it, replacing bit shit by BIT() macro and adding the version
> some registers were added to eDP specification.
>
> Cc: <dri-devel@lists.freedesktop.org>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> include/drm/drm_dp_helper.h | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 1e85c2021f2f..d6f6a084a190 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -687,14 +687,14 @@ struct drm_device;
> #define DP_DSC_ENABLE 0x160 /* DP 1.4 */
> # define DP_DECOMPRESSION_EN (1 << 0)
>
> -#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */
> -# define DP_PSR_ENABLE (1 << 0)
> -# define DP_PSR_MAIN_LINK_ACTIVE (1 << 1)
> -# define DP_PSR_CRC_VERIFICATION (1 << 2)
> -# define DP_PSR_FRAME_CAPTURE (1 << 3)
> -# define DP_PSR_SELECTIVE_UPDATE (1 << 4)
> -# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS (1 << 5)
> -# define DP_PSR_ENABLE_PSR2 (1 << 6) /* eDP 1.4a */
> +#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */
> +# define DP_PSR_ENABLE BIT(0)
> +# define DP_PSR_MAIN_LINK_ACTIVE BIT(1)
> +# define DP_PSR_CRC_VERIFICATION BIT(2)
> +# define DP_PSR_FRAME_CAPTURE BIT(3)
> +# define DP_PSR_SU_REGION_SCANLINE_CAPTURE BIT(4) /* eDP 1.4a */
> +# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS BIT(5) /* eDP
> 1.4a */
> +# define DP_PSR_ENABLE_PSR2 BIT(6) /* eDP 1.4a */
>
> #define DP_ADAPTER_CTRL 0x1a0
> # define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE (1 << 0)
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec
2021-04-22 11:00 ` Mun, Gwan-gyeong
@ 2021-04-23 10:25 ` Maarten Lankhorst
2021-04-23 14:52 ` Souza, Jose
0 siblings, 1 reply; 4+ messages in thread
From: Maarten Lankhorst @ 2021-04-23 10:25 UTC (permalink / raw)
To: Mun, Gwan-gyeong, intel-gfx, Souza, Jose; +Cc: Nikula, Jani, dri-devel
Op 22-04-2021 om 13:00 schreef Mun, Gwan-gyeong:
> The changed name looks more accurate to the edp 1.4b spec.
> Looks good to me.
>
> Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
>
> On Wed, 2021-04-21 at 15:02 -0700, José Roberto de Souza wrote:
>> DP_PSR_EN_CFG bit 5 aka "Selective Update Region Scan Line Capture
>> Indication" in eDP spec has a ambiguous name, so renaming to better
>> match specification.
>>
>> While at it, replacing bit shit by BIT() macro and adding the version
>> some registers were added to eDP specification.
>>
>> Cc: <dri-devel@lists.freedesktop.org>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Jani Nikula <jani.nikula@intel.com>
>> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
>> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
>> ---
>> include/drm/drm_dp_helper.h | 16 ++++++++--------
>> 1 file changed, 8 insertions(+), 8 deletions(-)
>>
>> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> index 1e85c2021f2f..d6f6a084a190 100644
>> --- a/include/drm/drm_dp_helper.h
>> +++ b/include/drm/drm_dp_helper.h
>> @@ -687,14 +687,14 @@ struct drm_device;
>> #define DP_DSC_ENABLE 0x160 /* DP 1.4 */
>> # define DP_DECOMPRESSION_EN (1 << 0)
>>
>> -#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */
>> -# define DP_PSR_ENABLE (1 << 0)
>> -# define DP_PSR_MAIN_LINK_ACTIVE (1 << 1)
>> -# define DP_PSR_CRC_VERIFICATION (1 << 2)
>> -# define DP_PSR_FRAME_CAPTURE (1 << 3)
>> -# define DP_PSR_SELECTIVE_UPDATE (1 << 4)
>> -# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS (1 << 5)
>> -# define DP_PSR_ENABLE_PSR2 (1 << 6) /* eDP 1.4a */
>> +#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */
>> +# define DP_PSR_ENABLE BIT(0)
>> +# define DP_PSR_MAIN_LINK_ACTIVE BIT(1)
>> +# define DP_PSR_CRC_VERIFICATION BIT(2)
>> +# define DP_PSR_FRAME_CAPTURE BIT(3)
>> +# define DP_PSR_SU_REGION_SCANLINE_CAPTURE BIT(4) /* eDP 1.4a */
>> +# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS BIT(5) /* eDP
>> 1.4a */
>> +# define DP_PSR_ENABLE_PSR2 BIT(6) /* eDP 1.4a */
>>
>> #define DP_ADAPTER_CTRL 0x1a0
>> # define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE (1 << 0)
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
This should probably go throuh drm-misc-next, I don't see the next patch depending on this?
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec
2021-04-23 10:25 ` [Intel-gfx] " Maarten Lankhorst
@ 2021-04-23 14:52 ` Souza, Jose
0 siblings, 0 replies; 4+ messages in thread
From: Souza, Jose @ 2021-04-23 14:52 UTC (permalink / raw)
To: Mun, Gwan-gyeong, maarten.lankhorst, intel-gfx; +Cc: Nikula, Jani, dri-devel
On Fri, 2021-04-23 at 12:25 +0200, Maarten Lankhorst wrote:
> Op 22-04-2021 om 13:00 schreef Mun, Gwan-gyeong:
> > The changed name looks more accurate to the edp 1.4b spec.
> > Looks good to me.
> >
> > Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> >
> > On Wed, 2021-04-21 at 15:02 -0700, José Roberto de Souza wrote:
> > > DP_PSR_EN_CFG bit 5 aka "Selective Update Region Scan Line Capture
> > > Indication" in eDP spec has a ambiguous name, so renaming to better
> > > match specification.
> > >
> > > While at it, replacing bit shit by BIT() macro and adding the version
> > > some registers were added to eDP specification.
> > >
> > > Cc: <dri-devel@lists.freedesktop.org>
> > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > ---
> > > include/drm/drm_dp_helper.h | 16 ++++++++--------
> > > 1 file changed, 8 insertions(+), 8 deletions(-)
> > >
> > > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> > > index 1e85c2021f2f..d6f6a084a190 100644
> > > --- a/include/drm/drm_dp_helper.h
> > > +++ b/include/drm/drm_dp_helper.h
> > > @@ -687,14 +687,14 @@ struct drm_device;
> > > #define DP_DSC_ENABLE 0x160 /* DP 1.4 */
> > > # define DP_DECOMPRESSION_EN (1 << 0)
> > >
> > > -#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */
> > > -# define DP_PSR_ENABLE (1 << 0)
> > > -# define DP_PSR_MAIN_LINK_ACTIVE (1 << 1)
> > > -# define DP_PSR_CRC_VERIFICATION (1 << 2)
> > > -# define DP_PSR_FRAME_CAPTURE (1 << 3)
> > > -# define DP_PSR_SELECTIVE_UPDATE (1 << 4)
> > > -# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS (1 << 5)
> > > -# define DP_PSR_ENABLE_PSR2 (1 << 6) /* eDP 1.4a */
> > > +#define DP_PSR_EN_CFG 0x170 /* XXX 1.2? */
> > > +# define DP_PSR_ENABLE BIT(0)
> > > +# define DP_PSR_MAIN_LINK_ACTIVE BIT(1)
> > > +# define DP_PSR_CRC_VERIFICATION BIT(2)
> > > +# define DP_PSR_FRAME_CAPTURE BIT(3)
> > > +# define DP_PSR_SU_REGION_SCANLINE_CAPTURE BIT(4) /* eDP 1.4a */
> > > +# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS BIT(5) /* eDP
> > > 1.4a */
> > > +# define DP_PSR_ENABLE_PSR2 BIT(6) /* eDP 1.4a */
> > >
> > > #define DP_ADAPTER_CTRL 0x1a0
> > > # define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE (1 << 0)
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> This should probably go throuh drm-misc-next, I don't see the next patch depending on this?
The patch depending on this change will be sent right after this one is merged.
>
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2021-04-21 22:02 [PATCH 1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec José Roberto de Souza
2021-04-22 11:00 ` Mun, Gwan-gyeong
2021-04-23 10:25 ` [Intel-gfx] " Maarten Lankhorst
2021-04-23 14:52 ` Souza, Jose
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