* [PATCH] drm/fourcc: Fix conflicting Y41x definitions
@ 2019-03-19 12:17 Maarten Lankhorst
2019-03-19 13:02 ` Ville Syrjälä
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: Maarten Lankhorst @ 2019-03-19 12:17 UTC (permalink / raw)
To: dri-devel
Cc: Maxime Ripard, Liviu Dudau, intel-gfx, Swati Sharma, Dave Airlie,
malidp, Ayan Kumar Halder, Sean Paul
There has unfortunately been a conflict with the following 3 commits:
commit e9961ab95af81b8d29054361cd5f0c575102cf87
Author: Ayan Kumar Halder <ayan.halder@arm.com>
Date: Fri Nov 9 17:21:12 2018 +0000
drm: Added a new format DRM_FORMAT_XVYU2101010
commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3
Author: Brian Starkey <brian.starkey@arm.com>
Date: Fri Oct 5 10:27:00 2018 +0100
drm/fourcc: Add AFBC yuv fourccs for Mali
and
commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b
Author: Swati Sharma <swati2.sharma@intel.com>
Date: Mon Mar 4 17:26:33 2019 +0530
drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
Unfortunately gcc didn't warn about the redefinitions, because the
Fix this by using new XYVU for i915, without alpha, and making the
Y41x definitions match msdn, with alpha.
Fortunately we caught it early, and the conflict hasn't even landed in
drm-next yet.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Brian Starkey <Brian.Starkey@arm.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Cc: Ayan Kumar Halder <ayan.halder@arm.com>
Cc: malidp@foss.arm.com
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Sean Paul <sean@poorly.run>
Cc: Dave Airlie <airlied@linux.ie>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>
---
drivers/gpu/drm/drm_fourcc.c | 12 +++++------
drivers/gpu/drm/i915/intel_display.c | 18 ++++++++---------
drivers/gpu/drm/i915/intel_sprite.c | 30 ++++++++++++++--------------
include/uapi/drm/drm_fourcc.h | 21 +++++++++----------
4 files changed, 41 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index b914b16db9b2..6ea55fb4526d 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -229,17 +229,17 @@ const struct drm_format_info *__drm_format_info(u32 format)
{ .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
- { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_VUY888, .depth = 0, .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
- { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
{ .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
- { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
- { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
- { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
- { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
+ { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
+ { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
+ { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
+ { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
+ { .format = DRM_FORMAT_XVYU12_16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
+ { .format = DRM_FORMAT_XVYU16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
{ .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
.char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
.hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index a5ad18c3bf44..94496488641c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2690,11 +2690,11 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
case PLANE_CTL_FORMAT_Y216:
return DRM_FORMAT_Y216;
case PLANE_CTL_FORMAT_Y410:
- return DRM_FORMAT_Y410;
+ return DRM_FORMAT_XVYU2101010;
case PLANE_CTL_FORMAT_Y412:
- return DRM_FORMAT_Y412;
+ return DRM_FORMAT_XVYU12_16161616;
case PLANE_CTL_FORMAT_Y416:
- return DRM_FORMAT_Y416;
+ return DRM_FORMAT_XVYU16161616;
default:
case PLANE_CTL_FORMAT_XRGB_8888:
if (rgb_order) {
@@ -3648,11 +3648,11 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
return PLANE_CTL_FORMAT_Y212;
case DRM_FORMAT_Y216:
return PLANE_CTL_FORMAT_Y216;
- case DRM_FORMAT_Y410:
+ case DRM_FORMAT_XVYU2101010:
return PLANE_CTL_FORMAT_Y410;
- case DRM_FORMAT_Y412:
+ case DRM_FORMAT_XVYU12_16161616:
return PLANE_CTL_FORMAT_Y412;
- case DRM_FORMAT_Y416:
+ case DRM_FORMAT_XVYU16161616:
return PLANE_CTL_FORMAT_Y416;
default:
MISSING_CASE(pixel_format);
@@ -5216,9 +5216,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
case DRM_FORMAT_Y210:
case DRM_FORMAT_Y212:
case DRM_FORMAT_Y216:
- case DRM_FORMAT_Y410:
- case DRM_FORMAT_Y412:
- case DRM_FORMAT_Y416:
+ case DRM_FORMAT_XVYU2101010:
+ case DRM_FORMAT_XVYU12_16161616:
+ case DRM_FORMAT_XVYU16161616:
break;
default:
DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 9892c88ede1d..53174d579574 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1821,9 +1821,9 @@ static const uint32_t icl_plane_formats[] = {
DRM_FORMAT_Y210,
DRM_FORMAT_Y212,
DRM_FORMAT_Y216,
- DRM_FORMAT_Y410,
- DRM_FORMAT_Y412,
- DRM_FORMAT_Y416,
+ DRM_FORMAT_XVYU2101010,
+ DRM_FORMAT_XVYU12_16161616,
+ DRM_FORMAT_XVYU16161616,
};
static const uint32_t icl_hdr_plane_formats[] = {
@@ -1846,9 +1846,9 @@ static const uint32_t icl_hdr_plane_formats[] = {
DRM_FORMAT_Y210,
DRM_FORMAT_Y212,
DRM_FORMAT_Y216,
- DRM_FORMAT_Y410,
- DRM_FORMAT_Y412,
- DRM_FORMAT_Y416,
+ DRM_FORMAT_XVYU2101010,
+ DRM_FORMAT_XVYU12_16161616,
+ DRM_FORMAT_XVYU16161616,
};
static const u32 skl_planar_formats[] = {
@@ -1906,9 +1906,9 @@ static const uint32_t icl_planar_formats[] = {
DRM_FORMAT_Y210,
DRM_FORMAT_Y212,
DRM_FORMAT_Y216,
- DRM_FORMAT_Y410,
- DRM_FORMAT_Y412,
- DRM_FORMAT_Y416,
+ DRM_FORMAT_XVYU2101010,
+ DRM_FORMAT_XVYU12_16161616,
+ DRM_FORMAT_XVYU16161616,
};
static const uint32_t icl_hdr_planar_formats[] = {
@@ -1935,9 +1935,9 @@ static const uint32_t icl_hdr_planar_formats[] = {
DRM_FORMAT_Y210,
DRM_FORMAT_Y212,
DRM_FORMAT_Y216,
- DRM_FORMAT_Y410,
- DRM_FORMAT_Y412,
- DRM_FORMAT_Y416,
+ DRM_FORMAT_XVYU2101010,
+ DRM_FORMAT_XVYU12_16161616,
+ DRM_FORMAT_XVYU16161616,
};
static const u64 skl_plane_format_modifiers_noccs[] = {
@@ -2085,9 +2085,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_Y210:
case DRM_FORMAT_Y212:
case DRM_FORMAT_Y216:
- case DRM_FORMAT_Y410:
- case DRM_FORMAT_Y412:
- case DRM_FORMAT_Y416:
+ case DRM_FORMAT_XVYU2101010:
+ case DRM_FORMAT_XVYU12_16161616:
+ case DRM_FORMAT_XVYU16161616:
if (modifier == I915_FORMAT_MOD_Yf_TILED)
return true;
/* fall through */
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 5010b47d0838..3feeaa3f987a 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -160,30 +160,31 @@ extern "C" {
#define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
#define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
#define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
-#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 10:6:10:6:10:6:10:6 little endian */
#define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
-#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
-#define DRM_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] X:Cr:Y:Cb 2:10:10:10 little endian */
+#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
#define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y 8:8:8 little endian */
-#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] A:Cr:Y:Cb 2:10:10:10 little endian */
#define DRM_FORMAT_VUY101010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only */
/*
* packed Y2xx indicate for each component, xx valid data occupy msb
* 16-xx padding occupy lsb
*/
-#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
-#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
-#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian per 2 Y pixels */
+#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
+#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
+#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Cr0:Y1:Cb0:Y0 16:16:16:16 little endian per 2 Y pixels */
/*
* packed Y4xx indicate for each component, xx valid data occupy msb
* 16-xx padding occupy lsb except Y410
*/
-#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] X:V:Y:U 2:10:10:10 little endian */
-#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] X:x:V:x:Y:x:U:x 12:4:12:4:12:4:12:4 little endian */
-#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] X:V:Y:U 16:16:16:16 little endian */
+#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] A:Cr:Y:Cb 2:10:10:10 little endian */
+#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] A:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
+#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] A:Cr:Y:Cb 16:16:16:16 little endian */
+
+#define DRM_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] X:Cr:Y:Cb 2:10:10:10 little endian */
+#define DRM_FORMAT_XVYU12_16161616 fourcc_code('X', 'V', '3', '6') /* [63:0] X:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
+#define DRM_FORMAT_XVYU16161616 fourcc_code('X', 'V', '4', '8') /* [63:0] X:Cr:Y:Cb 16:16:16:16 little endian */
/*
* packed YCbCr420 2x2 tiled formats
--
2.20.1
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^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/fourcc: Fix conflicting Y41x definitions
2019-03-19 12:17 [PATCH] drm/fourcc: Fix conflicting Y41x definitions Maarten Lankhorst
@ 2019-03-19 13:02 ` Ville Syrjälä
2019-03-19 16:06 ` Maarten Lankhorst
2019-03-19 13:58 ` Ayan Halder
` (2 subsequent siblings)
3 siblings, 1 reply; 9+ messages in thread
From: Ville Syrjälä @ 2019-03-19 13:02 UTC (permalink / raw)
To: Maarten Lankhorst
Cc: Maxime Ripard, intel-gfx, Dave Airlie, malidp, dri-devel,
Ayan Kumar Halder
On Tue, Mar 19, 2019 at 01:17:02PM +0100, Maarten Lankhorst wrote:
> There has unfortunately been a conflict with the following 3 commits:
>
> commit e9961ab95af81b8d29054361cd5f0c575102cf87
> Author: Ayan Kumar Halder <ayan.halder@arm.com>
> Date: Fri Nov 9 17:21:12 2018 +0000
> drm: Added a new format DRM_FORMAT_XVYU2101010
>
> commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3
> Author: Brian Starkey <brian.starkey@arm.com>
> Date: Fri Oct 5 10:27:00 2018 +0100
>
> drm/fourcc: Add AFBC yuv fourccs for Mali
>
> and
>
> commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b
> Author: Swati Sharma <swati2.sharma@intel.com>
> Date: Mon Mar 4 17:26:33 2019 +0530
>
> drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
>
> Unfortunately gcc didn't warn about the redefinitions, because the
>
> Fix this by using new XYVU for i915, without alpha, and making the
> Y41x definitions match msdn, with alpha.
The naming of all these is rather unfortunate because now the alpha vs.
non-alpha formats have totally different looking names :( Fourccs are
stupid!
>
> Fortunately we caught it early, and the conflict hasn't even landed in
> drm-next yet.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Brian Starkey <Brian.Starkey@arm.com>
> Cc: Swati Sharma <swati2.sharma@intel.com>
> Cc: Ayan Kumar Halder <ayan.halder@arm.com>
> Cc: malidp@foss.arm.com
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: Maxime Ripard <maxime.ripard@bootlin.com>
> Cc: Sean Paul <sean@poorly.run>
> Cc: Dave Airlie <airlied@linux.ie>
> Cc: Liviu Dudau <Liviu.Dudau@arm.com>
> ---
> drivers/gpu/drm/drm_fourcc.c | 12 +++++------
> drivers/gpu/drm/i915/intel_display.c | 18 ++++++++---------
> drivers/gpu/drm/i915/intel_sprite.c | 30 ++++++++++++++--------------
> include/uapi/drm/drm_fourcc.h | 21 +++++++++----------
> 4 files changed, 41 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index b914b16db9b2..6ea55fb4526d 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -229,17 +229,17 @@ const struct drm_format_info *__drm_format_info(u32 format)
> { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_VUY888, .depth = 0, .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> - { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> + { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> + { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> + { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_XVYU12_16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
Damn these 10/12 in 16 formats are annoying.
Maybe it would look nicer to put the 12 at the end?
> + { .format = DRM_FORMAT_XVYU16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
> .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
> .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a5ad18c3bf44..94496488641c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2690,11 +2690,11 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
> case PLANE_CTL_FORMAT_Y216:
> return DRM_FORMAT_Y216;
> case PLANE_CTL_FORMAT_Y410:
> - return DRM_FORMAT_Y410;
> + return DRM_FORMAT_XVYU2101010;
> case PLANE_CTL_FORMAT_Y412:
> - return DRM_FORMAT_Y412;
> + return DRM_FORMAT_XVYU12_16161616;
> case PLANE_CTL_FORMAT_Y416:
> - return DRM_FORMAT_Y416;
> + return DRM_FORMAT_XVYU16161616;
> default:
> case PLANE_CTL_FORMAT_XRGB_8888:
> if (rgb_order) {
> @@ -3648,11 +3648,11 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
> return PLANE_CTL_FORMAT_Y212;
> case DRM_FORMAT_Y216:
> return PLANE_CTL_FORMAT_Y216;
> - case DRM_FORMAT_Y410:
> + case DRM_FORMAT_XVYU2101010:
> return PLANE_CTL_FORMAT_Y410;
> - case DRM_FORMAT_Y412:
> + case DRM_FORMAT_XVYU12_16161616:
> return PLANE_CTL_FORMAT_Y412;
> - case DRM_FORMAT_Y416:
> + case DRM_FORMAT_XVYU16161616:
> return PLANE_CTL_FORMAT_Y416;
> default:
> MISSING_CASE(pixel_format);
> @@ -5216,9 +5216,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
> case DRM_FORMAT_Y210:
> case DRM_FORMAT_Y212:
> case DRM_FORMAT_Y216:
> - case DRM_FORMAT_Y410:
> - case DRM_FORMAT_Y412:
> - case DRM_FORMAT_Y416:
> + case DRM_FORMAT_XVYU2101010:
> + case DRM_FORMAT_XVYU12_16161616:
> + case DRM_FORMAT_XVYU16161616:
> break;
> default:
> DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 9892c88ede1d..53174d579574 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -1821,9 +1821,9 @@ static const uint32_t icl_plane_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> - DRM_FORMAT_Y410,
> - DRM_FORMAT_Y412,
> - DRM_FORMAT_Y416,
> + DRM_FORMAT_XVYU2101010,
> + DRM_FORMAT_XVYU12_16161616,
> + DRM_FORMAT_XVYU16161616,
The spec says only HDR planes support 64bpp formats. So either the spec
is wrong or we have way too many formats on the SDR plane format lists.
> };
>
> static const uint32_t icl_hdr_plane_formats[] = {
> @@ -1846,9 +1846,9 @@ static const uint32_t icl_hdr_plane_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> - DRM_FORMAT_Y410,
> - DRM_FORMAT_Y412,
> - DRM_FORMAT_Y416,
> + DRM_FORMAT_XVYU2101010,
> + DRM_FORMAT_XVYU12_16161616,
> + DRM_FORMAT_XVYU16161616,
> };
>
> static const u32 skl_planar_formats[] = {
> @@ -1906,9 +1906,9 @@ static const uint32_t icl_planar_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> - DRM_FORMAT_Y410,
> - DRM_FORMAT_Y412,
> - DRM_FORMAT_Y416,
> + DRM_FORMAT_XVYU2101010,
> + DRM_FORMAT_XVYU12_16161616,
> + DRM_FORMAT_XVYU16161616,
> };
>
> static const uint32_t icl_hdr_planar_formats[] = {
> @@ -1935,9 +1935,9 @@ static const uint32_t icl_hdr_planar_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> - DRM_FORMAT_Y410,
> - DRM_FORMAT_Y412,
> - DRM_FORMAT_Y416,
> + DRM_FORMAT_XVYU2101010,
> + DRM_FORMAT_XVYU12_16161616,
> + DRM_FORMAT_XVYU16161616,
> };
>
> static const u64 skl_plane_format_modifiers_noccs[] = {
> @@ -2085,9 +2085,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
> case DRM_FORMAT_Y210:
> case DRM_FORMAT_Y212:
> case DRM_FORMAT_Y216:
> - case DRM_FORMAT_Y410:
> - case DRM_FORMAT_Y412:
> - case DRM_FORMAT_Y416:
> + case DRM_FORMAT_XVYU2101010:
> + case DRM_FORMAT_XVYU12_16161616:
> + case DRM_FORMAT_XVYU16161616:
> if (modifier == I915_FORMAT_MOD_Yf_TILED)
> return true;
> /* fall through */
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 5010b47d0838..3feeaa3f987a 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -160,30 +160,31 @@ extern "C" {
> #define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
> #define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
> #define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
> -#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 10:6:10:6:10:6:10:6 little endian */
>
> #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
> -#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
> -#define DRM_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] X:Cr:Y:Cb 2:10:10:10 little endian */
> +#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
> #define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y 8:8:8 little endian */
> -#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] A:Cr:Y:Cb 2:10:10:10 little endian */
> #define DRM_FORMAT_VUY101010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only */
>
> /*
> * packed Y2xx indicate for each component, xx valid data occupy msb
> * 16-xx padding occupy lsb
> */
> -#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
> -#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
> -#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian per 2 Y pixels */
> +#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
> +#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
> +#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Cr0:Y1:Cb0:Y0 16:16:16:16 little endian per 2 Y pixels */
>
> /*
> * packed Y4xx indicate for each component, xx valid data occupy msb
> * 16-xx padding occupy lsb except Y410
> */
> -#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] X:V:Y:U 2:10:10:10 little endian */
> -#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] X:x:V:x:Y:x:U:x 12:4:12:4:12:4:12:4 little endian */
> -#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] X:V:Y:U 16:16:16:16 little endian */
> +#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] A:Cr:Y:Cb 2:10:10:10 little endian */
> +#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] A:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
> +#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] A:Cr:Y:Cb 16:16:16:16 little endian */
> +
> +#define DRM_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] X:Cr:Y:Cb 2:10:10:10 little endian */
> +#define DRM_FORMAT_XVYU12_16161616 fourcc_code('X', 'V', '3', '6') /* [63:0] X:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
> +#define DRM_FORMAT_XVYU16161616 fourcc_code('X', 'V', '4', '8') /* [63:0] X:Cr:Y:Cb 16:16:16:16 little endian */
>
> /*
> * packed YCbCr420 2x2 tiled formats
> --
> 2.20.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/fourcc: Fix conflicting Y41x definitions
2019-03-19 12:17 [PATCH] drm/fourcc: Fix conflicting Y41x definitions Maarten Lankhorst
2019-03-19 13:02 ` Ville Syrjälä
@ 2019-03-19 13:58 ` Ayan Halder
2019-03-20 15:48 ` Adam Jackson
[not found] ` <20190320182207.GL114153@art_vandelay>
3 siblings, 0 replies; 9+ messages in thread
From: Ayan Halder @ 2019-03-19 13:58 UTC (permalink / raw)
To: Maarten Lankhorst
Cc: Maxime Ripard, intel-gfx, Liviu Dudau, Swati Sharma, Dave Airlie,
malidp, dri-devel, nd, Sean Paul
On Tue, Mar 19, 2019 at 01:17:02PM +0100, Maarten Lankhorst wrote:
> There has unfortunately been a conflict with the following 3 commits:
>
> commit e9961ab95af81b8d29054361cd5f0c575102cf87
> Author: Ayan Kumar Halder <ayan.halder@arm.com>
> Date: Fri Nov 9 17:21:12 2018 +0000
> drm: Added a new format DRM_FORMAT_XVYU2101010
>
> commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3
> Author: Brian Starkey <brian.starkey@arm.com>
> Date: Fri Oct 5 10:27:00 2018 +0100
>
> drm/fourcc: Add AFBC yuv fourccs for Mali
>
> and
>
> commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b
> Author: Swati Sharma <swati2.sharma@intel.com>
> Date: Mon Mar 4 17:26:33 2019 +0530
>
> drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
>
> Unfortunately gcc didn't warn about the redefinitions, because the
>
> Fix this by using new XYVU for i915, without alpha, and making the
> Y41x definitions match msdn, with alpha.
>
> Fortunately we caught it early, and the conflict hasn't even landed in
> drm-next yet.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Brian Starkey <Brian.Starkey@arm.com>
> Cc: Swati Sharma <swati2.sharma@intel.com>
> Cc: Ayan Kumar Halder <ayan.halder@arm.com>
> Cc: malidp@foss.arm.com
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: Maxime Ripard <maxime.ripard@bootlin.com>
> Cc: Sean Paul <sean@poorly.run>
> Cc: Dave Airlie <airlied@linux.ie>
> Cc: Liviu Dudau <Liviu.Dudau@arm.com>
> ---
> drivers/gpu/drm/drm_fourcc.c | 12 +++++------
> drivers/gpu/drm/i915/intel_display.c | 18 ++++++++---------
> drivers/gpu/drm/i915/intel_sprite.c | 30 ++++++++++++++--------------
> include/uapi/drm/drm_fourcc.h | 21 +++++++++----------
> 4 files changed, 41 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index b914b16db9b2..6ea55fb4526d 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -229,17 +229,17 @@ const struct drm_format_info *__drm_format_info(u32 format)
> { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_VUY888, .depth = 0, .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> - { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> - { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> + { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> + { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> + { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_XVYU12_16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> + { .format = DRM_FORMAT_XVYU16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> { .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
> .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
> .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index a5ad18c3bf44..94496488641c 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -2690,11 +2690,11 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
> case PLANE_CTL_FORMAT_Y216:
> return DRM_FORMAT_Y216;
> case PLANE_CTL_FORMAT_Y410:
> - return DRM_FORMAT_Y410;
> + return DRM_FORMAT_XVYU2101010;
> case PLANE_CTL_FORMAT_Y412:
> - return DRM_FORMAT_Y412;
> + return DRM_FORMAT_XVYU12_16161616;
> case PLANE_CTL_FORMAT_Y416:
> - return DRM_FORMAT_Y416;
> + return DRM_FORMAT_XVYU16161616;
> default:
> case PLANE_CTL_FORMAT_XRGB_8888:
> if (rgb_order) {
> @@ -3648,11 +3648,11 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
> return PLANE_CTL_FORMAT_Y212;
> case DRM_FORMAT_Y216:
> return PLANE_CTL_FORMAT_Y216;
> - case DRM_FORMAT_Y410:
> + case DRM_FORMAT_XVYU2101010:
> return PLANE_CTL_FORMAT_Y410;
> - case DRM_FORMAT_Y412:
> + case DRM_FORMAT_XVYU12_16161616:
> return PLANE_CTL_FORMAT_Y412;
> - case DRM_FORMAT_Y416:
> + case DRM_FORMAT_XVYU16161616:
> return PLANE_CTL_FORMAT_Y416;
> default:
> MISSING_CASE(pixel_format);
> @@ -5216,9 +5216,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
> case DRM_FORMAT_Y210:
> case DRM_FORMAT_Y212:
> case DRM_FORMAT_Y216:
> - case DRM_FORMAT_Y410:
> - case DRM_FORMAT_Y412:
> - case DRM_FORMAT_Y416:
> + case DRM_FORMAT_XVYU2101010:
> + case DRM_FORMAT_XVYU12_16161616:
> + case DRM_FORMAT_XVYU16161616:
> break;
> default:
> DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 9892c88ede1d..53174d579574 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -1821,9 +1821,9 @@ static const uint32_t icl_plane_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> - DRM_FORMAT_Y410,
> - DRM_FORMAT_Y412,
> - DRM_FORMAT_Y416,
> + DRM_FORMAT_XVYU2101010,
> + DRM_FORMAT_XVYU12_16161616,
> + DRM_FORMAT_XVYU16161616,
> };
>
> static const uint32_t icl_hdr_plane_formats[] = {
> @@ -1846,9 +1846,9 @@ static const uint32_t icl_hdr_plane_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> - DRM_FORMAT_Y410,
> - DRM_FORMAT_Y412,
> - DRM_FORMAT_Y416,
> + DRM_FORMAT_XVYU2101010,
> + DRM_FORMAT_XVYU12_16161616,
> + DRM_FORMAT_XVYU16161616,
> };
>
> static const u32 skl_planar_formats[] = {
> @@ -1906,9 +1906,9 @@ static const uint32_t icl_planar_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> - DRM_FORMAT_Y410,
> - DRM_FORMAT_Y412,
> - DRM_FORMAT_Y416,
> + DRM_FORMAT_XVYU2101010,
> + DRM_FORMAT_XVYU12_16161616,
> + DRM_FORMAT_XVYU16161616,
> };
>
> static const uint32_t icl_hdr_planar_formats[] = {
> @@ -1935,9 +1935,9 @@ static const uint32_t icl_hdr_planar_formats[] = {
> DRM_FORMAT_Y210,
> DRM_FORMAT_Y212,
> DRM_FORMAT_Y216,
> - DRM_FORMAT_Y410,
> - DRM_FORMAT_Y412,
> - DRM_FORMAT_Y416,
> + DRM_FORMAT_XVYU2101010,
> + DRM_FORMAT_XVYU12_16161616,
> + DRM_FORMAT_XVYU16161616,
> };
>
> static const u64 skl_plane_format_modifiers_noccs[] = {
> @@ -2085,9 +2085,9 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
> case DRM_FORMAT_Y210:
> case DRM_FORMAT_Y212:
> case DRM_FORMAT_Y216:
> - case DRM_FORMAT_Y410:
> - case DRM_FORMAT_Y412:
> - case DRM_FORMAT_Y416:
> + case DRM_FORMAT_XVYU2101010:
> + case DRM_FORMAT_XVYU12_16161616:
> + case DRM_FORMAT_XVYU16161616:
> if (modifier == I915_FORMAT_MOD_Yf_TILED)
> return true;
> /* fall through */
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 5010b47d0838..3feeaa3f987a 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -160,30 +160,31 @@ extern "C" {
> #define DRM_FORMAT_YVYU fourcc_code('Y', 'V', 'Y', 'U') /* [31:0] Cb0:Y1:Cr0:Y0 8:8:8:8 little endian */
> #define DRM_FORMAT_UYVY fourcc_code('U', 'Y', 'V', 'Y') /* [31:0] Y1:Cr0:Y0:Cb0 8:8:8:8 little endian */
> #define DRM_FORMAT_VYUY fourcc_code('V', 'Y', 'U', 'Y') /* [31:0] Y1:Cb0:Y0:Cr0 8:8:8:8 little endian */
> -#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 10:6:10:6:10:6:10:6 little endian */
>
> #define DRM_FORMAT_AYUV fourcc_code('A', 'Y', 'U', 'V') /* [31:0] A:Y:Cb:Cr 8:8:8:8 little endian */
> -#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
> -#define DRM_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] X:Cr:Y:Cb 2:10:10:10 little endian */
> +#define DRM_FORMAT_XYUV8888 fourcc_code('X', 'Y', 'U', 'V') /* [31:0] X:Y:Cb:Cr 8:8:8:8 little endian */
> #define DRM_FORMAT_VUY888 fourcc_code('V', 'U', '2', '4') /* [23:0] Cr:Cb:Y 8:8:8 little endian */
> -#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] A:Cr:Y:Cb 2:10:10:10 little endian */
> #define DRM_FORMAT_VUY101010 fourcc_code('V', 'U', '3', '0') /* Y followed by U then V, 10:10:10. Non-linear modifier only */
>
> /*
> * packed Y2xx indicate for each component, xx valid data occupy msb
> * 16-xx padding occupy lsb
> */
> -#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
> -#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Y0:x:Cb0:x:Y1:x:Cr1:x 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
> -#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Y0:Cb0:Y1:Cr1 16:16:16:16 little endian per 2 Y pixels */
> +#define DRM_FORMAT_Y210 fourcc_code('Y', '2', '1', '0') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 10:6:10:6:10:6:10:6 little endian per 2 Y pixels */
> +#define DRM_FORMAT_Y212 fourcc_code('Y', '2', '1', '2') /* [63:0] Cr0:0:Y1:0:Cb0:0:Y0:0 12:4:12:4:12:4:12:4 little endian per 2 Y pixels */
> +#define DRM_FORMAT_Y216 fourcc_code('Y', '2', '1', '6') /* [63:0] Cr0:Y1:Cb0:Y0 16:16:16:16 little endian per 2 Y pixels */
>
> /*
> * packed Y4xx indicate for each component, xx valid data occupy msb
> * 16-xx padding occupy lsb except Y410
> */
> -#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] X:V:Y:U 2:10:10:10 little endian */
> -#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] X:x:V:x:Y:x:U:x 12:4:12:4:12:4:12:4 little endian */
> -#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] X:V:Y:U 16:16:16:16 little endian */
> +#define DRM_FORMAT_Y410 fourcc_code('Y', '4', '1', '0') /* [31:0] A:Cr:Y:Cb 2:10:10:10 little endian */
> +#define DRM_FORMAT_Y412 fourcc_code('Y', '4', '1', '2') /* [63:0] A:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
> +#define DRM_FORMAT_Y416 fourcc_code('Y', '4', '1', '6') /* [63:0] A:Cr:Y:Cb 16:16:16:16 little endian */
> +
> +#define DRM_FORMAT_XVYU2101010 fourcc_code('X', 'V', '3', '0') /* [31:0] X:Cr:Y:Cb 2:10:10:10 little endian */
> +#define DRM_FORMAT_XVYU12_16161616 fourcc_code('X', 'V', '3', '6') /* [63:0] X:0:Cr:0:Y:0:Cb:0 12:4:12:4:12:4:12:4 little endian */
> +#define DRM_FORMAT_XVYU16161616 fourcc_code('X', 'V', '4', '8') /* [63:0] X:Cr:Y:Cb 16:16:16:16 little endian */
>
> /*
> * packed YCbCr420 2x2 tiled formats
> --
> 2.20.1
>
Looks perfectly sane to me. Thanks for taking the pain. :)
Reviewed-by: Ayan Kumar halder <ayan.halder@arm.com>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/fourcc: Fix conflicting Y41x definitions
2019-03-19 13:02 ` Ville Syrjälä
@ 2019-03-19 16:06 ` Maarten Lankhorst
2019-03-19 16:18 ` Ville Syrjälä
0 siblings, 1 reply; 9+ messages in thread
From: Maarten Lankhorst @ 2019-03-19 16:06 UTC (permalink / raw)
To: Ville Syrjälä
Cc: Maxime Ripard, intel-gfx, Dave Airlie, malidp, dri-devel,
Ayan Kumar Halder
Op 19-03-2019 om 14:02 schreef Ville Syrjälä:
> On Tue, Mar 19, 2019 at 01:17:02PM +0100, Maarten Lankhorst wrote:
>> There has unfortunately been a conflict with the following 3 commits:
>>
>> commit e9961ab95af81b8d29054361cd5f0c575102cf87
>> Author: Ayan Kumar Halder <ayan.halder@arm.com>
>> Date: Fri Nov 9 17:21:12 2018 +0000
>> drm: Added a new format DRM_FORMAT_XVYU2101010
>>
>> commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3
>> Author: Brian Starkey <brian.starkey@arm.com>
>> Date: Fri Oct 5 10:27:00 2018 +0100
>>
>> drm/fourcc: Add AFBC yuv fourccs for Mali
>>
>> and
>>
>> commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b
>> Author: Swati Sharma <swati2.sharma@intel.com>
>> Date: Mon Mar 4 17:26:33 2019 +0530
>>
>> drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
>>
>> Unfortunately gcc didn't warn about the redefinitions, because the
>>
>> Fix this by using new XYVU for i915, without alpha, and making the
>> Y41x definitions match msdn, with alpha.
> The naming of all these is rather unfortunate because now the alpha vs.
> non-alpha formats have totally different looking names :( Fourccs are
> stupid!
>
>> Fortunately we caught it early, and the conflict hasn't even landed in
>> drm-next yet.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>> Cc: Brian Starkey <Brian.Starkey@arm.com>
>> Cc: Swati Sharma <swati2.sharma@intel.com>
>> Cc: Ayan Kumar Halder <ayan.halder@arm.com>
>> Cc: malidp@foss.arm.com
>> Cc: Daniel Vetter <daniel@ffwll.ch>
>> Cc: Maxime Ripard <maxime.ripard@bootlin.com>
>> Cc: Sean Paul <sean@poorly.run>
>> Cc: Dave Airlie <airlied@linux.ie>
>> Cc: Liviu Dudau <Liviu.Dudau@arm.com>
>> ---
>> drivers/gpu/drm/drm_fourcc.c | 12 +++++------
>> drivers/gpu/drm/i915/intel_display.c | 18 ++++++++---------
>> drivers/gpu/drm/i915/intel_sprite.c | 30 ++++++++++++++--------------
>> include/uapi/drm/drm_fourcc.h | 21 +++++++++----------
>> 4 files changed, 41 insertions(+), 40 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
>> index b914b16db9b2..6ea55fb4526d 100644
>> --- a/drivers/gpu/drm/drm_fourcc.c
>> +++ b/drivers/gpu/drm/drm_fourcc.c
>> @@ -229,17 +229,17 @@ const struct drm_format_info *__drm_format_info(u32 format)
>> { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>> { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>> { .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>> - { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>> { .format = DRM_FORMAT_VUY888, .depth = 0, .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>> - { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
>> { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
>> - { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>> { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>> { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>> { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>> - { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>> - { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>> - { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>> + { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
>> + { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
>> + { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
>> + { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>> + { .format = DRM_FORMAT_XVYU12_16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> Damn these 10/12 in 16 formats are annoying.
>
> Maybe it would look nicer to put the 12 at the end?
Either way sucks..
Could we keep it where it is so I don't have to respin? :)
>> + { .format = DRM_FORMAT_XVYU16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>> { .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
>> .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
>> .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>> index a5ad18c3bf44..94496488641c 100644
>> --- a/drivers/gpu/drm/i915/intel_display.c
>> +++ b/drivers/gpu/drm/i915/intel_display.c
>> @@ -2690,11 +2690,11 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
>> case PLANE_CTL_FORMAT_Y216:
>> return DRM_FORMAT_Y216;
>> case PLANE_CTL_FORMAT_Y410:
>> - return DRM_FORMAT_Y410;
>> + return DRM_FORMAT_XVYU2101010;
>> case PLANE_CTL_FORMAT_Y412:
>> - return DRM_FORMAT_Y412;
>> + return DRM_FORMAT_XVYU12_16161616;
>> case PLANE_CTL_FORMAT_Y416:
>> - return DRM_FORMAT_Y416;
>> + return DRM_FORMAT_XVYU16161616;
>> default:
>> case PLANE_CTL_FORMAT_XRGB_8888:
>> if (rgb_order) {
>> @@ -3648,11 +3648,11 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
>> return PLANE_CTL_FORMAT_Y212;
>> case DRM_FORMAT_Y216:
>> return PLANE_CTL_FORMAT_Y216;
>> - case DRM_FORMAT_Y410:
>> + case DRM_FORMAT_XVYU2101010:
>> return PLANE_CTL_FORMAT_Y410;
>> - case DRM_FORMAT_Y412:
>> + case DRM_FORMAT_XVYU12_16161616:
>> return PLANE_CTL_FORMAT_Y412;
>> - case DRM_FORMAT_Y416:
>> + case DRM_FORMAT_XVYU16161616:
>> return PLANE_CTL_FORMAT_Y416;
>> default:
>> MISSING_CASE(pixel_format);
>> @@ -5216,9 +5216,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>> case DRM_FORMAT_Y210:
>> case DRM_FORMAT_Y212:
>> case DRM_FORMAT_Y216:
>> - case DRM_FORMAT_Y410:
>> - case DRM_FORMAT_Y412:
>> - case DRM_FORMAT_Y416:
>> + case DRM_FORMAT_XVYU2101010:
>> + case DRM_FORMAT_XVYU12_16161616:
>> + case DRM_FORMAT_XVYU16161616:
>> break;
>> default:
>> DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
>> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
>> index 9892c88ede1d..53174d579574 100644
>> --- a/drivers/gpu/drm/i915/intel_sprite.c
>> +++ b/drivers/gpu/drm/i915/intel_sprite.c
>> @@ -1821,9 +1821,9 @@ static const uint32_t icl_plane_formats[] = {
>> DRM_FORMAT_Y210,
>> DRM_FORMAT_Y212,
>> DRM_FORMAT_Y216,
>> - DRM_FORMAT_Y410,
>> - DRM_FORMAT_Y412,
>> - DRM_FORMAT_Y416,
>> + DRM_FORMAT_XVYU2101010,
>> + DRM_FORMAT_XVYU12_16161616,
>> + DRM_FORMAT_XVYU16161616,
> The spec says only HDR planes support 64bpp formats. So either the spec
> is wrong or we have way too many formats on the SDR plane format lists.
It seems kms_available_modes_crc passes with those formats on icl-y, so I'm assuming it works?
~Maarten
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/fourcc: Fix conflicting Y41x definitions
2019-03-19 16:06 ` Maarten Lankhorst
@ 2019-03-19 16:18 ` Ville Syrjälä
2019-03-20 10:28 ` Maarten Lankhorst
0 siblings, 1 reply; 9+ messages in thread
From: Ville Syrjälä @ 2019-03-19 16:18 UTC (permalink / raw)
To: Maarten Lankhorst
Cc: Maxime Ripard, intel-gfx, Dave Airlie, malidp, dri-devel,
Ayan Kumar Halder
On Tue, Mar 19, 2019 at 05:06:36PM +0100, Maarten Lankhorst wrote:
> Op 19-03-2019 om 14:02 schreef Ville Syrjälä:
> > On Tue, Mar 19, 2019 at 01:17:02PM +0100, Maarten Lankhorst wrote:
> >> There has unfortunately been a conflict with the following 3 commits:
> >>
> >> commit e9961ab95af81b8d29054361cd5f0c575102cf87
> >> Author: Ayan Kumar Halder <ayan.halder@arm.com>
> >> Date: Fri Nov 9 17:21:12 2018 +0000
> >> drm: Added a new format DRM_FORMAT_XVYU2101010
> >>
> >> commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3
> >> Author: Brian Starkey <brian.starkey@arm.com>
> >> Date: Fri Oct 5 10:27:00 2018 +0100
> >>
> >> drm/fourcc: Add AFBC yuv fourccs for Mali
> >>
> >> and
> >>
> >> commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b
> >> Author: Swati Sharma <swati2.sharma@intel.com>
> >> Date: Mon Mar 4 17:26:33 2019 +0530
> >>
> >> drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
> >>
> >> Unfortunately gcc didn't warn about the redefinitions, because the
> >>
> >> Fix this by using new XYVU for i915, without alpha, and making the
> >> Y41x definitions match msdn, with alpha.
> > The naming of all these is rather unfortunate because now the alpha vs.
> > non-alpha formats have totally different looking names :( Fourccs are
> > stupid!
> >
> >> Fortunately we caught it early, and the conflict hasn't even landed in
> >> drm-next yet.
> >>
> >> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> >> Cc: Brian Starkey <Brian.Starkey@arm.com>
> >> Cc: Swati Sharma <swati2.sharma@intel.com>
> >> Cc: Ayan Kumar Halder <ayan.halder@arm.com>
> >> Cc: malidp@foss.arm.com
> >> Cc: Daniel Vetter <daniel@ffwll.ch>
> >> Cc: Maxime Ripard <maxime.ripard@bootlin.com>
> >> Cc: Sean Paul <sean@poorly.run>
> >> Cc: Dave Airlie <airlied@linux.ie>
> >> Cc: Liviu Dudau <Liviu.Dudau@arm.com>
> >> ---
> >> drivers/gpu/drm/drm_fourcc.c | 12 +++++------
> >> drivers/gpu/drm/i915/intel_display.c | 18 ++++++++---------
> >> drivers/gpu/drm/i915/intel_sprite.c | 30 ++++++++++++++--------------
> >> include/uapi/drm/drm_fourcc.h | 21 +++++++++----------
> >> 4 files changed, 41 insertions(+), 40 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> >> index b914b16db9b2..6ea55fb4526d 100644
> >> --- a/drivers/gpu/drm/drm_fourcc.c
> >> +++ b/drivers/gpu/drm/drm_fourcc.c
> >> @@ -229,17 +229,17 @@ const struct drm_format_info *__drm_format_info(u32 format)
> >> { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> >> { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> >> { .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> >> - { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> >> { .format = DRM_FORMAT_VUY888, .depth = 0, .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> >> - { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> >> { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> >> - { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> >> { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> >> { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> >> { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
> >> - { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> >> - { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> >> - { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> >> + { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> >> + { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> >> + { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
> >> + { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> >> + { .format = DRM_FORMAT_XVYU12_16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> > Damn these 10/12 in 16 formats are annoying.
> >
> > Maybe it would look nicer to put the 12 at the end?
>
> Either way sucks..
>
> Could we keep it where it is so I don't have to respin? :)
>
> >> + { .format = DRM_FORMAT_XVYU16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
> >> { .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
> >> .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
> >> .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
> >> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> >> index a5ad18c3bf44..94496488641c 100644
> >> --- a/drivers/gpu/drm/i915/intel_display.c
> >> +++ b/drivers/gpu/drm/i915/intel_display.c
> >> @@ -2690,11 +2690,11 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
> >> case PLANE_CTL_FORMAT_Y216:
> >> return DRM_FORMAT_Y216;
> >> case PLANE_CTL_FORMAT_Y410:
> >> - return DRM_FORMAT_Y410;
> >> + return DRM_FORMAT_XVYU2101010;
> >> case PLANE_CTL_FORMAT_Y412:
> >> - return DRM_FORMAT_Y412;
> >> + return DRM_FORMAT_XVYU12_16161616;
> >> case PLANE_CTL_FORMAT_Y416:
> >> - return DRM_FORMAT_Y416;
> >> + return DRM_FORMAT_XVYU16161616;
> >> default:
> >> case PLANE_CTL_FORMAT_XRGB_8888:
> >> if (rgb_order) {
> >> @@ -3648,11 +3648,11 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
> >> return PLANE_CTL_FORMAT_Y212;
> >> case DRM_FORMAT_Y216:
> >> return PLANE_CTL_FORMAT_Y216;
> >> - case DRM_FORMAT_Y410:
> >> + case DRM_FORMAT_XVYU2101010:
> >> return PLANE_CTL_FORMAT_Y410;
> >> - case DRM_FORMAT_Y412:
> >> + case DRM_FORMAT_XVYU12_16161616:
> >> return PLANE_CTL_FORMAT_Y412;
> >> - case DRM_FORMAT_Y416:
> >> + case DRM_FORMAT_XVYU16161616:
> >> return PLANE_CTL_FORMAT_Y416;
> >> default:
> >> MISSING_CASE(pixel_format);
> >> @@ -5216,9 +5216,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
> >> case DRM_FORMAT_Y210:
> >> case DRM_FORMAT_Y212:
> >> case DRM_FORMAT_Y216:
> >> - case DRM_FORMAT_Y410:
> >> - case DRM_FORMAT_Y412:
> >> - case DRM_FORMAT_Y416:
> >> + case DRM_FORMAT_XVYU2101010:
> >> + case DRM_FORMAT_XVYU12_16161616:
> >> + case DRM_FORMAT_XVYU16161616:
> >> break;
> >> default:
> >> DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
> >> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> >> index 9892c88ede1d..53174d579574 100644
> >> --- a/drivers/gpu/drm/i915/intel_sprite.c
> >> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> >> @@ -1821,9 +1821,9 @@ static const uint32_t icl_plane_formats[] = {
> >> DRM_FORMAT_Y210,
> >> DRM_FORMAT_Y212,
> >> DRM_FORMAT_Y216,
> >> - DRM_FORMAT_Y410,
> >> - DRM_FORMAT_Y412,
> >> - DRM_FORMAT_Y416,
> >> + DRM_FORMAT_XVYU2101010,
> >> + DRM_FORMAT_XVYU12_16161616,
> >> + DRM_FORMAT_XVYU16161616,
> > The spec says only HDR planes support 64bpp formats. So either the spec
> > is wrong or we have way too many formats on the SDR plane format lists.
>
> It seems kms_available_modes_crc passes with those formats on icl-y, so I'm assuming it works?
JP said a bunch of yuv things fail again. So either my fixes didn't
really fix things or stuff regressed again.
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/fourcc: Fix conflicting Y41x definitions
2019-03-19 16:18 ` Ville Syrjälä
@ 2019-03-20 10:28 ` Maarten Lankhorst
0 siblings, 0 replies; 9+ messages in thread
From: Maarten Lankhorst @ 2019-03-20 10:28 UTC (permalink / raw)
To: Ville Syrjälä
Cc: Maxime Ripard, intel-gfx, Liviu Dudau, Swati Sharma, Dave Airlie,
malidp, dri-devel, Ayan Kumar Halder, Sean Paul
Op 19-03-2019 om 17:18 schreef Ville Syrjälä:
> On Tue, Mar 19, 2019 at 05:06:36PM +0100, Maarten Lankhorst wrote:
>> Op 19-03-2019 om 14:02 schreef Ville Syrjälä:
>>> On Tue, Mar 19, 2019 at 01:17:02PM +0100, Maarten Lankhorst wrote:
>>>> There has unfortunately been a conflict with the following 3 commits:
>>>>
>>>> commit e9961ab95af81b8d29054361cd5f0c575102cf87
>>>> Author: Ayan Kumar Halder <ayan.halder@arm.com>
>>>> Date: Fri Nov 9 17:21:12 2018 +0000
>>>> drm: Added a new format DRM_FORMAT_XVYU2101010
>>>>
>>>> commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3
>>>> Author: Brian Starkey <brian.starkey@arm.com>
>>>> Date: Fri Oct 5 10:27:00 2018 +0100
>>>>
>>>> drm/fourcc: Add AFBC yuv fourccs for Mali
>>>>
>>>> and
>>>>
>>>> commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b
>>>> Author: Swati Sharma <swati2.sharma@intel.com>
>>>> Date: Mon Mar 4 17:26:33 2019 +0530
>>>>
>>>> drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
>>>>
>>>> Unfortunately gcc didn't warn about the redefinitions, because the
>>>>
>>>> Fix this by using new XYVU for i915, without alpha, and making the
>>>> Y41x definitions match msdn, with alpha.
>>> The naming of all these is rather unfortunate because now the alpha vs.
>>> non-alpha formats have totally different looking names :( Fourccs are
>>> stupid!
>>>
>>>> Fortunately we caught it early, and the conflict hasn't even landed in
>>>> drm-next yet.
>>>>
>>>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>>>> Cc: Brian Starkey <Brian.Starkey@arm.com>
>>>> Cc: Swati Sharma <swati2.sharma@intel.com>
>>>> Cc: Ayan Kumar Halder <ayan.halder@arm.com>
>>>> Cc: malidp@foss.arm.com
>>>> Cc: Daniel Vetter <daniel@ffwll.ch>
>>>> Cc: Maxime Ripard <maxime.ripard@bootlin.com>
>>>> Cc: Sean Paul <sean@poorly.run>
>>>> Cc: Dave Airlie <airlied@linux.ie>
>>>> Cc: Liviu Dudau <Liviu.Dudau@arm.com>
>>>> ---
>>>> drivers/gpu/drm/drm_fourcc.c | 12 +++++------
>>>> drivers/gpu/drm/i915/intel_display.c | 18 ++++++++---------
>>>> drivers/gpu/drm/i915/intel_sprite.c | 30 ++++++++++++++--------------
>>>> include/uapi/drm/drm_fourcc.h | 21 +++++++++----------
>>>> 4 files changed, 41 insertions(+), 40 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
>>>> index b914b16db9b2..6ea55fb4526d 100644
>>>> --- a/drivers/gpu/drm/drm_fourcc.c
>>>> +++ b/drivers/gpu/drm/drm_fourcc.c
>>>> @@ -229,17 +229,17 @@ const struct drm_format_info *__drm_format_info(u32 format)
>>>> { .format = DRM_FORMAT_UYVY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>>>> { .format = DRM_FORMAT_VYUY, .depth = 0, .num_planes = 1, .cpp = { 2, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>>>> { .format = DRM_FORMAT_XYUV8888, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>>>> - { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>>>> { .format = DRM_FORMAT_VUY888, .depth = 0, .num_planes = 1, .cpp = { 3, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>>>> - { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
>>>> { .format = DRM_FORMAT_AYUV, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
>>>> - { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>>>> { .format = DRM_FORMAT_Y210, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>>>> { .format = DRM_FORMAT_Y212, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>>>> { .format = DRM_FORMAT_Y216, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 2, .vsub = 1, .is_yuv = true },
>>>> - { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>>>> - { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>>>> - { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>>>> + { .format = DRM_FORMAT_Y410, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
>>>> + { .format = DRM_FORMAT_Y412, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
>>>> + { .format = DRM_FORMAT_Y416, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .has_alpha = true, .is_yuv = true },
>>>> + { .format = DRM_FORMAT_XVYU2101010, .depth = 0, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>>>> + { .format = DRM_FORMAT_XVYU12_16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>>> Damn these 10/12 in 16 formats are annoying.
>>>
>>> Maybe it would look nicer to put the 12 at the end?
>> Either way sucks..
>>
>> Could we keep it where it is so I don't have to respin? :)
>>
>>>> + { .format = DRM_FORMAT_XVYU16161616, .depth = 0, .num_planes = 1, .cpp = { 8, 0, 0 }, .hsub = 1, .vsub = 1, .is_yuv = true },
>>>> { .format = DRM_FORMAT_Y0L0, .depth = 0, .num_planes = 1,
>>>> .char_per_block = { 8, 0, 0 }, .block_w = { 2, 0, 0 }, .block_h = { 2, 0, 0 },
>>>> .hsub = 2, .vsub = 2, .has_alpha = true, .is_yuv = true },
>>>> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>>>> index a5ad18c3bf44..94496488641c 100644
>>>> --- a/drivers/gpu/drm/i915/intel_display.c
>>>> +++ b/drivers/gpu/drm/i915/intel_display.c
>>>> @@ -2690,11 +2690,11 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
>>>> case PLANE_CTL_FORMAT_Y216:
>>>> return DRM_FORMAT_Y216;
>>>> case PLANE_CTL_FORMAT_Y410:
>>>> - return DRM_FORMAT_Y410;
>>>> + return DRM_FORMAT_XVYU2101010;
>>>> case PLANE_CTL_FORMAT_Y412:
>>>> - return DRM_FORMAT_Y412;
>>>> + return DRM_FORMAT_XVYU12_16161616;
>>>> case PLANE_CTL_FORMAT_Y416:
>>>> - return DRM_FORMAT_Y416;
>>>> + return DRM_FORMAT_XVYU16161616;
>>>> default:
>>>> case PLANE_CTL_FORMAT_XRGB_8888:
>>>> if (rgb_order) {
>>>> @@ -3648,11 +3648,11 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
>>>> return PLANE_CTL_FORMAT_Y212;
>>>> case DRM_FORMAT_Y216:
>>>> return PLANE_CTL_FORMAT_Y216;
>>>> - case DRM_FORMAT_Y410:
>>>> + case DRM_FORMAT_XVYU2101010:
>>>> return PLANE_CTL_FORMAT_Y410;
>>>> - case DRM_FORMAT_Y412:
>>>> + case DRM_FORMAT_XVYU12_16161616:
>>>> return PLANE_CTL_FORMAT_Y412;
>>>> - case DRM_FORMAT_Y416:
>>>> + case DRM_FORMAT_XVYU16161616:
>>>> return PLANE_CTL_FORMAT_Y416;
>>>> default:
>>>> MISSING_CASE(pixel_format);
>>>> @@ -5216,9 +5216,9 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>>>> case DRM_FORMAT_Y210:
>>>> case DRM_FORMAT_Y212:
>>>> case DRM_FORMAT_Y216:
>>>> - case DRM_FORMAT_Y410:
>>>> - case DRM_FORMAT_Y412:
>>>> - case DRM_FORMAT_Y416:
>>>> + case DRM_FORMAT_XVYU2101010:
>>>> + case DRM_FORMAT_XVYU12_16161616:
>>>> + case DRM_FORMAT_XVYU16161616:
>>>> break;
>>>> default:
>>>> DRM_DEBUG_KMS("[PLANE:%d:%s] FB:%d unsupported scaling format 0x%x\n",
>>>> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
>>>> index 9892c88ede1d..53174d579574 100644
>>>> --- a/drivers/gpu/drm/i915/intel_sprite.c
>>>> +++ b/drivers/gpu/drm/i915/intel_sprite.c
>>>> @@ -1821,9 +1821,9 @@ static const uint32_t icl_plane_formats[] = {
>>>> DRM_FORMAT_Y210,
>>>> DRM_FORMAT_Y212,
>>>> DRM_FORMAT_Y216,
>>>> - DRM_FORMAT_Y410,
>>>> - DRM_FORMAT_Y412,
>>>> - DRM_FORMAT_Y416,
>>>> + DRM_FORMAT_XVYU2101010,
>>>> + DRM_FORMAT_XVYU12_16161616,
>>>> + DRM_FORMAT_XVYU16161616,
>>> The spec says only HDR planes support 64bpp formats. So either the spec
>>> is wrong or we have way too many formats on the SDR plane format lists.
>> It seems kms_available_modes_crc passes with those formats on icl-y, so I'm assuming it works?
> JP said a bunch of yuv things fail again. So either my fixes didn't
> really fix things or stuff regressed again.
>
Fun.
Is the original name XYUV12_16161616 ok with you? would just like to move it forward.
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/fourcc: Fix conflicting Y41x definitions
2019-03-19 12:17 [PATCH] drm/fourcc: Fix conflicting Y41x definitions Maarten Lankhorst
2019-03-19 13:02 ` Ville Syrjälä
2019-03-19 13:58 ` Ayan Halder
@ 2019-03-20 15:48 ` Adam Jackson
2019-03-20 16:00 ` Maarten Lankhorst
[not found] ` <20190320182207.GL114153@art_vandelay>
3 siblings, 1 reply; 9+ messages in thread
From: Adam Jackson @ 2019-03-20 15:48 UTC (permalink / raw)
To: Maarten Lankhorst, dri-devel
Cc: Maxime Ripard, intel-gfx, Liviu Dudau, Swati Sharma, Dave Airlie,
malidp, Ayan Kumar Halder, Sean Paul
On Tue, 2019-03-19 at 13:17 +0100, Maarten Lankhorst wrote:
> There has unfortunately been a conflict with the following 3 commits:
>
> commit e9961ab95af81b8d29054361cd5f0c575102cf87
> Author: Ayan Kumar Halder <ayan.halder@arm.com>
> Date: Fri Nov 9 17:21:12 2018 +0000
> drm: Added a new format DRM_FORMAT_XVYU2101010
>
> commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3
> Author: Brian Starkey <brian.starkey@arm.com>
> Date: Fri Oct 5 10:27:00 2018 +0100
>
> drm/fourcc: Add AFBC yuv fourccs for Mali
>
> and
>
> commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b
> Author: Swati Sharma <swati2.sharma@intel.com>
> Date: Mon Mar 4 17:26:33 2019 +0530
>
> drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
>
> Unfortunately gcc didn't warn about the redefinitions, because the
>
... sentence got cut off here.
- ajax
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/fourcc: Fix conflicting Y41x definitions
2019-03-20 15:48 ` Adam Jackson
@ 2019-03-20 16:00 ` Maarten Lankhorst
0 siblings, 0 replies; 9+ messages in thread
From: Maarten Lankhorst @ 2019-03-20 16:00 UTC (permalink / raw)
To: Adam Jackson, dri-devel
Cc: Maxime Ripard, intel-gfx, Liviu Dudau, Swati Sharma, Dave Airlie,
malidp, Ayan Kumar Halder, Sean Paul
Op 20-03-2019 om 16:48 schreef Adam Jackson:
> On Tue, 2019-03-19 at 13:17 +0100, Maarten Lankhorst wrote:
>> There has unfortunately been a conflict with the following 3 commits:
>>
>> commit e9961ab95af81b8d29054361cd5f0c575102cf87
>> Author: Ayan Kumar Halder <ayan.halder@arm.com>
>> Date: Fri Nov 9 17:21:12 2018 +0000
>> drm: Added a new format DRM_FORMAT_XVYU2101010
>>
>> commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3
>> Author: Brian Starkey <brian.starkey@arm.com>
>> Date: Fri Oct 5 10:27:00 2018 +0100
>>
>> drm/fourcc: Add AFBC yuv fourccs for Mali
>>
>> and
>>
>> commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b
>> Author: Swati Sharma <swati2.sharma@intel.com>
>> Date: Mon Mar 4 17:26:33 2019 +0530
>>
>> drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
>>
>> Unfortunately gcc didn't warn about the redefinitions, because the
>>
> ... sentence got cut off here.
>
> - ajax
>
... double defines were the set to same value, and gcc apparently no longer warns about that.
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/fourcc: Fix conflicting Y41x definitions
[not found] ` <20190320182207.GL114153@art_vandelay>
@ 2019-03-21 9:14 ` Maarten Lankhorst
0 siblings, 0 replies; 9+ messages in thread
From: Maarten Lankhorst @ 2019-03-21 9:14 UTC (permalink / raw)
To: Sean Paul
Cc: Maxime Ripard, intel-gfx, Dave Airlie, malidp, dri-devel,
Ayan Kumar Halder
Op 20-03-2019 om 19:22 schreef Sean Paul:
> On Tue, Mar 19, 2019 at 01:17:02PM +0100, Maarten Lankhorst wrote:
>> There has unfortunately been a conflict with the following 3 commits:
>>
>> commit e9961ab95af81b8d29054361cd5f0c575102cf87
>> Author: Ayan Kumar Halder <ayan.halder@arm.com>
>> Date: Fri Nov 9 17:21:12 2018 +0000
>> drm: Added a new format DRM_FORMAT_XVYU2101010
>>
>> commit 7ba0fee247ee7a36b3bfbed68f6988d980aa3aa3
>> Author: Brian Starkey <brian.starkey@arm.com>
>> Date: Fri Oct 5 10:27:00 2018 +0100
>>
>> drm/fourcc: Add AFBC yuv fourccs for Mali
>>
>> and
>>
>> commit 50bf5d7d595fd0705ef3785f80e679b6da501e5b
>> Author: Swati Sharma <swati2.sharma@intel.com>
>> Date: Mon Mar 4 17:26:33 2019 +0530
>>
>> drm: Add Y2xx and Y4xx (xx:10/12/16) format definitions and fourcc
>>
>> Unfortunately gcc didn't warn about the redefinitions, because the
>>
>> Fix this by using new XYVU for i915, without alpha, and making the
>> Y41x definitions match msdn, with alpha.
>>
>> Fortunately we caught it early, and the conflict hasn't even landed in
>> drm-next yet.
>>
>> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Please fixup the commit message oops that ajax pointed out. With that,
>
> Acked-by: Sean Paul <sean@poorly.run>
Thanks, pushed to drm-misc-next. :)
~Maarten
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^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-03-21 9:14 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-03-19 12:17 [PATCH] drm/fourcc: Fix conflicting Y41x definitions Maarten Lankhorst
2019-03-19 13:02 ` Ville Syrjälä
2019-03-19 16:06 ` Maarten Lankhorst
2019-03-19 16:18 ` Ville Syrjälä
2019-03-20 10:28 ` Maarten Lankhorst
2019-03-19 13:58 ` Ayan Halder
2019-03-20 15:48 ` Adam Jackson
2019-03-20 16:00 ` Maarten Lankhorst
[not found] ` <20190320182207.GL114153@art_vandelay>
2019-03-21 9:14 ` Maarten Lankhorst
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