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([2a01:e0a:90c:e290:4a89:8c32:4adc:fc67]) by smtp.gmail.com with ESMTPSA id b12sm1471523wro.28.2021.04.30.01.35.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 30 Apr 2021 01:35:50 -0700 (PDT) Subject: Re: [PATCH v3 0/3] drm/bridge: nwl-dsi: Get MIPI DSI controller and PHY ready in ->mode_set() To: Liu Ying , dri-devel@lists.freedesktop.org References: <1619170003-4817-1-git-send-email-victor.liu@nxp.com> From: Neil Armstrong Organization: Baylibre Message-ID: Date: Fri, 30 Apr 2021 10:35:48 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: <1619170003-4817-1-git-send-email-victor.liu@nxp.com> Content-Language: en-US X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jernej.skrabec@siol.net, jonas@kwiboo.se, airlied@linux.ie, agx@sigxcpu.org, linux-kernel@vger.kernel.org, robert.foss@linaro.org, a.hajda@samsung.com, Laurent.pinchart@ideasonboard.com, robert.chiras@nxp.com, linux-imx@nxp.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 23/04/2021 11:26, Liu Ying wrote: > Hi, > > This series aims to make the nwl-dsi bridge be able to connect with > more MIPI DSI panels. Some MIPI DSI panel drivers like 'raydium,rm68200' > send MIPI_DCS_SET_DISPLAY_ON commands in panel_funcs->prepare(), which > requires the MIPI DSI controller and PHY to be ready beforehand. > However, the existing nwl-dsi driver gets the MIPI DSI controller and > PHY ready in bridge_funcs->pre_enable(), which happens after the > panel_funcs->prepare(). So, this series shifts the bridge operation > ealier from bridge_funcs->pre_enable() to bridge_funcs->mode_set(). > > Patch 3/3 does the essential bridge operation shift. > > Patch 1/3 and 2/3 are split from the original single patch in v2 and > are needed by patch 3/3. This split-up helps clarify changes better. > The split-up is done in this way: > > 1) Patch 1/3 forces a full modeset when crtc_state->active is changed to > be true(which implies only connector's DPMS is brought out of "Off" > status, though not necessarily). This makes sure ->mode_set() and > ->atomic_disable() will be called in pairs. > 2) Patch 2/3 removes a check on unchanged HS clock rate from ->mode_set(), > to make sure MIPI DSI controller and PHY are brought up and taken down > in pairs. > 3) Patch 3/3 shifts the bridge operation as the last step. > > > v2->v3: > * Split the single patch in v2 into 3 patches. (Neil) > > v1->v2: > * Fix a typo in commit message - s/unchange/unchanged/ > > > Liu Ying (3): > drm/bridge: nwl-dsi: Force a full modeset when crtc_state->active is > changed to be true > drm/bridge: nwl-dsi: Remove a check on unchanged HS clock rate from > ->mode_set() > drm/bridge: nwl-dsi: Get MIPI DSI controller and PHY ready in > ->mode_set() > > drivers/gpu/drm/bridge/nwl-dsi.c | 86 +++++++++++++++++--------------- > 1 file changed, 46 insertions(+), 40 deletions(-) > Applying to drm-misc-next Thanks, Neil _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel