From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 335F2CCA482 for ; Thu, 14 Jul 2022 12:06:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DB39811291B; Thu, 14 Jul 2022 12:06:35 +0000 (UTC) Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by gabe.freedesktop.org (Postfix) with ESMTPS id 326BC1128ED; Thu, 14 Jul 2022 12:06:32 +0000 (UTC) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 11F4361E29; Thu, 14 Jul 2022 12:06:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6A83CC34115; Thu, 14 Jul 2022 12:06:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657800390; bh=Q3PvrZaFh8yidXeIp5BuRSLNfcqnlDsJtIj9djuNb0k=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=I3nE6rQ8BmrjmbidGZcBMiKHvI2fdOizwhaFeWQbyZ21kXuZzX6DvVuCcAHbkl+3k E1J7b9+o8PZrI5Wds9dGC26Rf+W7MkhHvlo+mT1fUy5w8A3vEO3Mw0S+hDEqO3kIIR s9DwHv+v7rWiBM4Ijj8XuZQ/Y614roN+TVnjuIEdReoeieXfV+aK2j8npgFucnauiQ LdjYaqkcKoJcYu0y6YkBHRNbJS1S6h2JJj+D9Au/A4E8UFCctFt3I2jctOGqBF2y19 1SSIZKCJWfjlZPQgb250pV8Yor5GJKAlTJ7+gMl8LYqR95Xz9bj+YNbp0YbTtdPXah 8OW+NNoagcl4A== Received: from mchehab by mail.kernel.org with local (Exim 4.95) (envelope-from ) id 1oBxbv-0059sh-SF; Thu, 14 Jul 2022 13:06:27 +0100 From: Mauro Carvalho Chehab To: Subject: [PATCH v2 05/21] drm/i915/gt: Skip TLB invalidations once wedged Date: Thu, 14 Jul 2022 13:06:10 +0100 Message-Id: X-Mailer: git-send-email 2.36.1 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tvrtko Ursulin , Andi Shyti , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , David Airlie , dri-devel@lists.freedesktop.org, Lucas De Marchi , linux-kernel@vger.kernel.org, Chris Wilson , Daniele Ceraolo Spurio , Rodrigo Vivi , Dave Airlie , stable@vger.kernel.org, Mauro Carvalho Chehab , intel-gfx@lists.freedesktop.org, Fei Yang Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Chris Wilson Skip all further TLB invalidations once the device is wedged and had been reset, as, on such cases, it can no longer process instructions on the GPU and the user no longer has access to the TLB's in each engine. That helps to reduce the performance regression introduced by TLB invalidate logic. Cc: stable@vger.kernel.org Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store") Signed-off-by: Chris Wilson Cc: Fei Yang Cc: Andi Shyti Acked-by: Thomas Hellström Signed-off-by: Mauro Carvalho Chehab --- To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. See [PATCH v2 00/21] at: https://lore.kernel.org/all/cover.1657800199.git.mchehab@kernel.org/ drivers/gpu/drm/i915/gt/intel_gt.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index 1d84418e8676..5c55a90672f4 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -934,6 +934,9 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt) if (I915_SELFTEST_ONLY(gt->awake == -ENODEV)) return; + if (intel_gt_is_wedged(gt)) + return; + if (GRAPHICS_VER(i915) == 12) { regs = gen12_regs; num = ARRAY_SIZE(gen12_regs); -- 2.36.1