From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C1931C04A68 for ; Thu, 28 Jul 2022 11:04:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8363C98EC7; Thu, 28 Jul 2022 11:03:59 +0000 (UTC) Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2444198E46 for ; Thu, 28 Jul 2022 11:03:58 +0000 (UTC) Received: from [192.168.1.111] (91-158-154-79.elisa-laajakaista.fi [91.158.154.79]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id E366D56D; Thu, 28 Jul 2022 13:03:55 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1659006236; bh=4C5fixSDw1OhkJhVXTYHM7W8UHnH5gRoIf+wUO4yo1U=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Ipevg5r0GyMQWYZN+8cuQD6AIp3Kxw50cwc+B9UIstrn+rQ9xW5SnJUj9aqgwnlz+ UDgJQqJgHV/zJVdi1uS7ctRp/DTJI5TUQA01mGVxp9lFT4fwnoYDxj7dDQwG/q4Xmd ayXE5EVemDF3A/aszMN6BDSKV0pMIplBq+Su46VQ= Message-ID: Date: Thu, 28 Jul 2022 14:03:53 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH 4/8] drm/tidss: Add support for Dual Link LVDS Bus Format Content-Language: en-US To: Aradhya Bhatia References: <20220719080845.22122-1-a-bhatia1@ti.com> <20220719080845.22122-5-a-bhatia1@ti.com> From: Tomi Valkeinen In-Reply-To: <20220719080845.22122-5-a-bhatia1@ti.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Devicetree List , Krzysztof Kozlowski , Vignesh Raghavendra , Devarsh Thakkar , David Airlie , Linux Kernel List , DRI Development List , Darren Etheridge , Rob Herring , Jyri Sarha , Rahul T R , Krunal Bhargav Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" On 19/07/2022 11:08, Aradhya Bhatia wrote: > The 2 OLDI TXes in the AM625 SoC can be synced together to output a 2K > resolution video. > > Add support in the driver for the discovery of such a dual mode > connection on the OLDI video port, using the values of "ti,oldi-mode" > property. > > Signed-off-by: Aradhya Bhatia > --- > drivers/gpu/drm/tidss/tidss_dispc.c | 39 +++++++++++++++++++++-------- > 1 file changed, 28 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c > index add725fa682b..fb1fdecfc83a 100644 > --- a/drivers/gpu/drm/tidss/tidss_dispc.c > +++ b/drivers/gpu/drm/tidss/tidss_dispc.c > @@ -853,25 +853,36 @@ void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask) > } > } > > -enum dispc_oldi_mode_reg_val { SPWG_18 = 0, JEIDA_24 = 1, SPWG_24 = 2 }; > +enum dispc_oldi_mode_reg_val { > + SPWG_18 = 0, > + JEIDA_24 = 1, > + SPWG_24 = 2, > + DL_SPWG_18 = 4, > + DL_JEIDA_24 = 5, > + DL_SPWG_24 = 6, > +}; > > struct dispc_bus_format { > u32 bus_fmt; > u32 data_width; > bool is_oldi_fmt; > + bool is_dual_link; > enum dispc_oldi_mode_reg_val oldi_mode_reg_val; > }; > > static const struct dispc_bus_format dispc_bus_formats[] = { > - { MEDIA_BUS_FMT_RGB444_1X12, 12, false, 0 }, > - { MEDIA_BUS_FMT_RGB565_1X16, 16, false, 0 }, > - { MEDIA_BUS_FMT_RGB666_1X18, 18, false, 0 }, > - { MEDIA_BUS_FMT_RGB888_1X24, 24, false, 0 }, > - { MEDIA_BUS_FMT_RGB101010_1X30, 30, false, 0 }, > - { MEDIA_BUS_FMT_RGB121212_1X36, 36, false, 0 }, > - { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, 18, true, SPWG_18 }, > - { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, 24, true, SPWG_24 }, > - { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, true, JEIDA_24 }, > + { MEDIA_BUS_FMT_RGB444_1X12, 12, false, false, 0 }, > + { MEDIA_BUS_FMT_RGB565_1X16, 16, false, false, 0 }, > + { MEDIA_BUS_FMT_RGB666_1X18, 18, false, false, 0 }, > + { MEDIA_BUS_FMT_RGB888_1X24, 24, false, false, 0 }, > + { MEDIA_BUS_FMT_RGB101010_1X30, 30, false, false, 0 }, > + { MEDIA_BUS_FMT_RGB121212_1X36, 36, false, false, 0 }, > + { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, 18, true, false, SPWG_18 }, > + { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, 24, true, false, SPWG_24 }, > + { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, true, false, JEIDA_24 }, > + { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, 18, true, true, DL_SPWG_18 }, > + { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, 24, true, true, DL_SPWG_24 }, > + { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, true, true, DL_JEIDA_24 }, > }; So the dual link sends two pixels per clock, right? Are there panel or bridge drivers that support this? My initial thought was that it should be a new bus format. Tomi