* [PATCH libdrm] intel: sync i915_pciids.h with kernel
@ 2019-12-10 20:06 José Roberto de Souza
2019-12-12 17:17 ` Matt Roper
0 siblings, 1 reply; 15+ messages in thread
From: José Roberto de Souza @ 2019-12-10 20:06 UTC (permalink / raw)
To: dri-devel; +Cc: José Roberto de Souza, James Ausmus
It is missing the new EHL/JSL PCI ids added in commit
651cc835d5f6 ("drm/i915: Add new EHL/JSL PCI ids")
Cc: James Ausmus <james.ausmus@intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
intel/i915_pciids.h | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
index b1f66b11..3e26a917 100644
--- a/intel/i915_pciids.h
+++ b/intel/i915_pciids.h
@@ -579,12 +579,15 @@
INTEL_VGA_DEVICE(0x8A51, info), \
INTEL_VGA_DEVICE(0x8A5D, info)
-/* EHL */
+/* EHL/JSL */
#define INTEL_EHL_IDS(info) \
INTEL_VGA_DEVICE(0x4500, info), \
INTEL_VGA_DEVICE(0x4571, info), \
INTEL_VGA_DEVICE(0x4551, info), \
- INTEL_VGA_DEVICE(0x4541, info)
+ INTEL_VGA_DEVICE(0x4541, info), \
+ INTEL_VGA_DEVICE(0x4E71, info), \
+ INTEL_VGA_DEVICE(0x4E61, info), \
+ INTEL_VGA_DEVICE(0x4E51, info)
/* TGL */
#define INTEL_TGL_12_IDS(info) \
--
2.24.0
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^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH libdrm] intel: sync i915_pciids.h with kernel
2019-12-10 20:06 [PATCH libdrm] intel: sync i915_pciids.h with kernel José Roberto de Souza
@ 2019-12-12 17:17 ` Matt Roper
2019-12-16 16:52 ` Souza, Jose
0 siblings, 1 reply; 15+ messages in thread
From: Matt Roper @ 2019-12-12 17:17 UTC (permalink / raw)
To: José Roberto de Souza; +Cc: dri-devel, James Ausmus
On Tue, Dec 10, 2019 at 12:06:11PM -0800, José Roberto de Souza wrote:
> It is missing the new EHL/JSL PCI ids added in commit
> 651cc835d5f6 ("drm/i915: Add new EHL/JSL PCI ids")
>
> Cc: James Ausmus <james.ausmus@intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Matches the kernel and the bspec.
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> intel/i915_pciids.h | 7 +++++--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
> index b1f66b11..3e26a917 100644
> --- a/intel/i915_pciids.h
> +++ b/intel/i915_pciids.h
> @@ -579,12 +579,15 @@
> INTEL_VGA_DEVICE(0x8A51, info), \
> INTEL_VGA_DEVICE(0x8A5D, info)
>
> -/* EHL */
> +/* EHL/JSL */
> #define INTEL_EHL_IDS(info) \
> INTEL_VGA_DEVICE(0x4500, info), \
> INTEL_VGA_DEVICE(0x4571, info), \
> INTEL_VGA_DEVICE(0x4551, info), \
> - INTEL_VGA_DEVICE(0x4541, info)
> + INTEL_VGA_DEVICE(0x4541, info), \
> + INTEL_VGA_DEVICE(0x4E71, info), \
> + INTEL_VGA_DEVICE(0x4E61, info), \
> + INTEL_VGA_DEVICE(0x4E51, info)
>
> /* TGL */
> #define INTEL_TGL_12_IDS(info) \
> --
> 2.24.0
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH libdrm] intel: sync i915_pciids.h with kernel
2019-12-12 17:17 ` Matt Roper
@ 2019-12-16 16:52 ` Souza, Jose
0 siblings, 0 replies; 15+ messages in thread
From: Souza, Jose @ 2019-12-16 16:52 UTC (permalink / raw)
To: Roper, Matthew D; +Cc: dri-devel, Ausmus, James
On Thu, 2019-12-12 at 09:17 -0800, Matt Roper wrote:
> On Tue, Dec 10, 2019 at 12:06:11PM -0800, José Roberto de Souza
> wrote:
> > It is missing the new EHL/JSL PCI ids added in commit
> > 651cc835d5f6 ("drm/i915: Add new EHL/JSL PCI ids")
> >
> > Cc: James Ausmus <james.ausmus@intel.com>
> > Cc: Matt Roper <matthew.d.roper@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
>
> Matches the kernel and the bspec.
>
> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Thanks for the review.
I just requested libdrm commit access in the mean time could someone
push this?
Thanks
>
> > ---
> > intel/i915_pciids.h | 7 +++++--
> > 1 file changed, 5 insertions(+), 2 deletions(-)
> >
> > diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
> > index b1f66b11..3e26a917 100644
> > --- a/intel/i915_pciids.h
> > +++ b/intel/i915_pciids.h
> > @@ -579,12 +579,15 @@
> > INTEL_VGA_DEVICE(0x8A51, info), \
> > INTEL_VGA_DEVICE(0x8A5D, info)
> >
> > -/* EHL */
> > +/* EHL/JSL */
> > #define INTEL_EHL_IDS(info) \
> > INTEL_VGA_DEVICE(0x4500, info), \
> > INTEL_VGA_DEVICE(0x4571, info), \
> > INTEL_VGA_DEVICE(0x4551, info), \
> > - INTEL_VGA_DEVICE(0x4541, info)
> > + INTEL_VGA_DEVICE(0x4541, info), \
> > + INTEL_VGA_DEVICE(0x4E71, info), \
> > + INTEL_VGA_DEVICE(0x4E61, info), \
> > + INTEL_VGA_DEVICE(0x4E51, info)
> >
> > /* TGL */
> > #define INTEL_TGL_12_IDS(info) \
> > --
> > 2.24.0
> >
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH libdrm] intel: sync i915_pciids.h with kernel
@ 2020-08-20 8:46 Adam Miszczak
2020-08-20 17:24 ` Souza, Jose
0 siblings, 1 reply; 15+ messages in thread
From: Adam Miszczak @ 2020-08-20 8:46 UTC (permalink / raw)
To: dri-devel; +Cc: José Roberto de Souza, Adam Miszczak
Add DG1 and clean-up VLV PCI IDs.
Align with kernel commits:
f2bde2546b81 ("drm/i915: Remove dubious Valleyview PCI IDs")
fd38cdb81105 ("drm/i915/dg1: Add DG1 PCI IDs")
Signed-off-by: Adam Miszczak <adam.miszczak@linux.intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
---
intel/i915_pciids.h | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
index d6cb2899..8e7ae30e 100644
--- a/intel/i915_pciids.h
+++ b/intel/i915_pciids.h
@@ -258,9 +258,7 @@
INTEL_VGA_DEVICE(0x0f30, info), \
INTEL_VGA_DEVICE(0x0f31, info), \
INTEL_VGA_DEVICE(0x0f32, info), \
- INTEL_VGA_DEVICE(0x0f33, info), \
- INTEL_VGA_DEVICE(0x0157, info), \
- INTEL_VGA_DEVICE(0x0155, info)
+ INTEL_VGA_DEVICE(0x0f33, info)
#define INTEL_BDW_ULT_GT1_IDS(info) \
INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
@@ -618,4 +616,8 @@
INTEL_VGA_DEVICE(0x4C90, info), \
INTEL_VGA_DEVICE(0x4C9A, info)
+/* DG1 */
+#define INTEL_DG1_IDS(info) \
+ INTEL_VGA_DEVICE(0x4905, info)
+
#endif /* _I915_PCIIDS_H */
--
2.27.0
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^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH libdrm] intel: sync i915_pciids.h with kernel
2020-08-20 8:46 Adam Miszczak
@ 2020-08-20 17:24 ` Souza, Jose
0 siblings, 0 replies; 15+ messages in thread
From: Souza, Jose @ 2020-08-20 17:24 UTC (permalink / raw)
To: dri-devel, adam.miszczak
On Thu, 2020-08-20 at 10:46 +0200, Adam Miszczak wrote:
> Add DG1 and clean-up VLV PCI IDs.
>
> Align with kernel commits:
> f2bde2546b81 ("drm/i915: Remove dubious Valleyview PCI IDs")
> fd38cdb81105 ("drm/i915/dg1: Add DG1 PCI IDs")
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
But the current process for libdrm patches is to open a merge request in Freedesktop gitlab, when you do CC me.
> Signed-off-by: Adam Miszczak <
> adam.miszczak@linux.intel.com
> >
> Cc: José Roberto de Souza <
> jose.souza@intel.com
> >
> ---
> intel/i915_pciids.h | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
> index d6cb2899..8e7ae30e 100644
> --- a/intel/i915_pciids.h
> +++ b/intel/i915_pciids.h
> @@ -258,9 +258,7 @@
> INTEL_VGA_DEVICE(0x0f30, info), \
> INTEL_VGA_DEVICE(0x0f31, info), \
> INTEL_VGA_DEVICE(0x0f32, info), \
> - INTEL_VGA_DEVICE(0x0f33, info), \
> - INTEL_VGA_DEVICE(0x0157, info), \
> - INTEL_VGA_DEVICE(0x0155, info)
> + INTEL_VGA_DEVICE(0x0f33, info)
>
> #define INTEL_BDW_ULT_GT1_IDS(info) \
> INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
> @@ -618,4 +616,8 @@
> INTEL_VGA_DEVICE(0x4C90, info), \
> INTEL_VGA_DEVICE(0x4C9A, info)
>
> +/* DG1 */
> +#define INTEL_DG1_IDS(info) \
> + INTEL_VGA_DEVICE(0x4905, info)
> +
> #endif /* _I915_PCIIDS_H */
>
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH libdrm] intel: sync i915_pciids.h with kernel
@ 2020-06-16 12:37 ramadevi.gandi
0 siblings, 0 replies; 15+ messages in thread
From: ramadevi.gandi @ 2020-06-16 12:37 UTC (permalink / raw)
To: ashutosh.dixit, dri-devel, intel-gfx, ramadevi.gandi, igt-dev
Cc: kalyan.kondapally
From: Gandi Ramadevi <ramadevi.gandi@intel.com>
Add DG1 PCI ID
Signed-off-by: Gandi Ramadevi <ramadevi.gandi@intel.com>
---
intel/i915_pciids.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
index 662d8351..724e68a0 100644
--- a/intel/i915_pciids.h
+++ b/intel/i915_pciids.h
@@ -605,4 +605,9 @@
INTEL_VGA_DEVICE(0x9AD9, info), \
INTEL_VGA_DEVICE(0x9AF8, info)
+/* DG1 */
+#define INTEL_DG1_IDS(info) \
+ INTEL_VGA_DEVICE(0x4905, info), \
+ INTEL_VGA_DEVICE(0x4906, info)
+
#endif /* _I915_PCIIDS_H */
--
2.25.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH libdrm] intel: sync i915_pciids.h with kernel
@ 2020-03-20 0:38 Swathi Dhanavanthri
2020-03-23 12:04 ` Timo Aaltonen
0 siblings, 1 reply; 15+ messages in thread
From: Swathi Dhanavanthri @ 2020-03-20 0:38 UTC (permalink / raw)
To: dri-devel; +Cc: swathi.dhanavanthri
Changes:
91b79fb35d67 ("drm/i915/tgl: Add new PCI IDs to TGL")
Signed-off-by: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com>
---
intel/i915_pciids.h | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
index 1d2c1221..662d8351 100644
--- a/intel/i915_pciids.h
+++ b/intel/i915_pciids.h
@@ -593,12 +593,16 @@
/* TGL */
#define INTEL_TGL_12_IDS(info) \
- INTEL_VGA_DEVICE(0x9A49, info), \
INTEL_VGA_DEVICE(0x9A40, info), \
+ INTEL_VGA_DEVICE(0x9A49, info), \
INTEL_VGA_DEVICE(0x9A59, info), \
INTEL_VGA_DEVICE(0x9A60, info), \
INTEL_VGA_DEVICE(0x9A68, info), \
INTEL_VGA_DEVICE(0x9A70, info), \
- INTEL_VGA_DEVICE(0x9A78, info)
+ INTEL_VGA_DEVICE(0x9A78, info), \
+ INTEL_VGA_DEVICE(0x9AC0, info), \
+ INTEL_VGA_DEVICE(0x9AC9, info), \
+ INTEL_VGA_DEVICE(0x9AD9, info), \
+ INTEL_VGA_DEVICE(0x9AF8, info)
#endif /* _I915_PCIIDS_H */
--
2.20.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH libdrm] intel: sync i915_pciids.h with kernel
2020-03-20 0:38 Swathi Dhanavanthri
@ 2020-03-23 12:04 ` Timo Aaltonen
0 siblings, 0 replies; 15+ messages in thread
From: Timo Aaltonen @ 2020-03-23 12:04 UTC (permalink / raw)
To: Swathi Dhanavanthri, dri-devel
On 20.3.2020 2.38, Swathi Dhanavanthri wrote:
> Changes:
> 91b79fb35d67 ("drm/i915/tgl: Add new PCI IDs to TGL")
>
> Signed-off-by: Swathi Dhanavanthri <swathi.dhanavanthri@intel.com>
> ---
> intel/i915_pciids.h | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
> index 1d2c1221..662d8351 100644
> --- a/intel/i915_pciids.h
> +++ b/intel/i915_pciids.h
> @@ -593,12 +593,16 @@
>
> /* TGL */
> #define INTEL_TGL_12_IDS(info) \
> - INTEL_VGA_DEVICE(0x9A49, info), \
> INTEL_VGA_DEVICE(0x9A40, info), \
> + INTEL_VGA_DEVICE(0x9A49, info), \
> INTEL_VGA_DEVICE(0x9A59, info), \
> INTEL_VGA_DEVICE(0x9A60, info), \
> INTEL_VGA_DEVICE(0x9A68, info), \
> INTEL_VGA_DEVICE(0x9A70, info), \
> - INTEL_VGA_DEVICE(0x9A78, info)
> + INTEL_VGA_DEVICE(0x9A78, info), \
> + INTEL_VGA_DEVICE(0x9AC0, info), \
> + INTEL_VGA_DEVICE(0x9AC9, info), \
> + INTEL_VGA_DEVICE(0x9AD9, info), \
> + INTEL_VGA_DEVICE(0x9AF8, info)
>
> #endif /* _I915_PCIIDS_H */
>
Thanks, reviewed and applied. I did change the "Changes" commit sha to
match what's in drm-intel-next-queued now.
--
t
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH libdrm] intel: sync i915_pciids.h with kernel
@ 2019-08-30 20:32 Anusha Srivatsa
2019-09-05 17:54 ` Souza, Jose
0 siblings, 1 reply; 15+ messages in thread
From: Anusha Srivatsa @ 2019-08-30 20:32 UTC (permalink / raw)
To: dri-devel; +Cc: Anusha Srivatsa, José Roberto de Souza
Add the new CML PCI IDS.
Align with kernel commit:
bfc4c359b2822 ("drm/i915/cml: Add Missing PCI IDs")
This is in sync with kernel header as of:
0747590267e7 ("drm-tip: 2019y-08m-30d-18h-03m-18s UTC integration manifest")
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
intel/i915_pciids.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
index a70c982d..b1f66b11 100644
--- a/intel/i915_pciids.h
+++ b/intel/i915_pciids.h
@@ -466,7 +466,10 @@
INTEL_VGA_DEVICE(0x9BC5, info), \
INTEL_VGA_DEVICE(0x9BC8, info), \
INTEL_VGA_DEVICE(0x9BC4, info), \
- INTEL_VGA_DEVICE(0x9BC2, info)
+ INTEL_VGA_DEVICE(0x9BC2, info), \
+ INTEL_VGA_DEVICE(0x9BC6, info), \
+ INTEL_VGA_DEVICE(0x9BE6, info), \
+ INTEL_VGA_DEVICE(0x9BF6, info)
#define INTEL_KBL_IDS(info) \
INTEL_KBL_GT1_IDS(info), \
--
2.23.0
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^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH libdrm] intel: sync i915_pciids.h with kernel
2019-08-30 20:32 Anusha Srivatsa
@ 2019-09-05 17:54 ` Souza, Jose
0 siblings, 0 replies; 15+ messages in thread
From: Souza, Jose @ 2019-09-05 17:54 UTC (permalink / raw)
To: dri-devel, Srivatsa, Anusha
On Fri, 2019-08-30 at 13:32 -0700, Anusha Srivatsa wrote:
> Add the new CML PCI IDS.
>
> Align with kernel commit:
> bfc4c359b2822 ("drm/i915/cml: Add Missing PCI IDs")
>
> This is in sync with kernel header as of:
> 0747590267e7 ("drm-tip: 2019y-08m-30d-18h-03m-18s UTC integration
> manifest")
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> intel/i915_pciids.h | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
> index a70c982d..b1f66b11 100644
> --- a/intel/i915_pciids.h
> +++ b/intel/i915_pciids.h
> @@ -466,7 +466,10 @@
> INTEL_VGA_DEVICE(0x9BC5, info), \
> INTEL_VGA_DEVICE(0x9BC8, info), \
> INTEL_VGA_DEVICE(0x9BC4, info), \
> - INTEL_VGA_DEVICE(0x9BC2, info)
> + INTEL_VGA_DEVICE(0x9BC2, info), \
> + INTEL_VGA_DEVICE(0x9BC6, info), \
> + INTEL_VGA_DEVICE(0x9BE6, info), \
> + INTEL_VGA_DEVICE(0x9BF6, info)
>
> #define INTEL_KBL_IDS(info) \
> INTEL_KBL_GT1_IDS(info), \
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH libdrm] intel: sync i915_pciids.h with kernel
@ 2019-03-22 20:35 Anusha
2019-03-22 21:03 ` Souza, Jose
0 siblings, 1 reply; 15+ messages in thread
From: Anusha @ 2019-03-22 20:35 UTC (permalink / raw)
To: dri-devel
Cc: Anusha, Lucas De Marchi, Antonio Argenziano, José Roberto de Souza
Straight copy from the kernel file.
Add PCI IDs for CML, add additional PCI ID
for ICL.
Align with kernel commits:
a7b4deeb02b97 ("drm/i915/cml: Add CML PCI IDS")
9a751b999d17a ("drm/i915: Add new ICL PCI ID")
v2: Do a copy from kernel header (Jose)
- Change commit message (Lucas)
v3: Add corresponding kernel commit IDs (Antonio)
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
intel/i915_pciids.h | 31 +++++++++++++++++++++++++++++--
1 file changed, 29 insertions(+), 2 deletions(-)
diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
index d2fad7b0..291b5e3f 100644
--- a/intel/i915_pciids.h
+++ b/intel/i915_pciids.h
@@ -373,6 +373,30 @@
#define INTEL_AML_CFL_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x87CA, info)
+/* CML GT1 */
+#define INTEL_CML_GT1_IDS(info) \
+ INTEL_VGA_DEVICE(0x9B21, info), \
+ INTEL_VGA_DEVICE(0x9BAA, info), \
+ INTEL_VGA_DEVICE(0x9BAB, info), \
+ INTEL_VGA_DEVICE(0x9BAC, info), \
+ INTEL_VGA_DEVICE(0x9BA0, info), \
+ INTEL_VGA_DEVICE(0x9BA5, info), \
+ INTEL_VGA_DEVICE(0x9BA8, info), \
+ INTEL_VGA_DEVICE(0x9BA4, info), \
+ INTEL_VGA_DEVICE(0x9BA2, info)
+
+/* CML GT2 */
+#define INTEL_CML_GT2_IDS(info) \
+ INTEL_VGA_DEVICE(0x9B41, info), \
+ INTEL_VGA_DEVICE(0x9BCA, info), \
+ INTEL_VGA_DEVICE(0x9BCB, info), \
+ INTEL_VGA_DEVICE(0x9BCC, info), \
+ INTEL_VGA_DEVICE(0x9BC0, info), \
+ INTEL_VGA_DEVICE(0x9BC5, info), \
+ INTEL_VGA_DEVICE(0x9BC8, info), \
+ INTEL_VGA_DEVICE(0x9BC4, info), \
+ INTEL_VGA_DEVICE(0x9BC2, info)
+
#define INTEL_KBL_IDS(info) \
INTEL_KBL_GT1_IDS(info), \
INTEL_KBL_GT2_IDS(info), \
@@ -436,7 +460,9 @@
INTEL_WHL_U_GT1_IDS(info), \
INTEL_WHL_U_GT2_IDS(info), \
INTEL_WHL_U_GT3_IDS(info), \
- INTEL_AML_CFL_GT2_IDS(info)
+ INTEL_AML_CFL_GT2_IDS(info), \
+ INTEL_CML_GT1_IDS(info), \
+ INTEL_CML_GT2_IDS(info)
/* CNL */
#define INTEL_CNL_IDS(info) \
@@ -469,6 +495,7 @@
INTEL_VGA_DEVICE(0x8A57, info), \
INTEL_VGA_DEVICE(0x8A56, info), \
INTEL_VGA_DEVICE(0x8A71, info), \
- INTEL_VGA_DEVICE(0x8A70, info)
+ INTEL_VGA_DEVICE(0x8A70, info), \
+ INTEL_VGA_DEVICE(0x8A53, info)
#endif /* _I915_PCIIDS_H */
--
2.21.0
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^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH libdrm] intel: sync i915_pciids.h with kernel
2019-03-22 20:35 Anusha
@ 2019-03-22 21:03 ` Souza, Jose
2019-03-25 10:28 ` Jani Nikula
0 siblings, 1 reply; 15+ messages in thread
From: Souza, Jose @ 2019-03-22 21:03 UTC (permalink / raw)
To: dri-devel, Srivatsa, Anusha; +Cc: De Marchi, Lucas, Argenziano, Antonio
[-- Attachment #1.1: Type: text/plain, Size: 2722 bytes --]
On Fri, 2019-03-22 at 13:35 -0700, Anusha wrote:
> Straight copy from the kernel file.
>
> Add PCI IDs for CML, add additional PCI ID
> for ICL.
>
> Align with kernel commits:
>
> a7b4deeb02b97 ("drm/i915/cml: Add CML PCI IDS")
> 9a751b999d17a ("drm/i915: Add new ICL PCI ID")
>
> v2: Do a copy from kernel header (Jose)
> - Change commit message (Lucas)
>
> v3: Add corresponding kernel commit IDs (Antonio)
Not sure if libdrm have a style rule but in i915 we use 12 digits for
the commit hash, other than that:
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> intel/i915_pciids.h | 31 +++++++++++++++++++++++++++++--
> 1 file changed, 29 insertions(+), 2 deletions(-)
>
> diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
> index d2fad7b0..291b5e3f 100644
> --- a/intel/i915_pciids.h
> +++ b/intel/i915_pciids.h
> @@ -373,6 +373,30 @@
> #define INTEL_AML_CFL_GT2_IDS(info) \
> INTEL_VGA_DEVICE(0x87CA, info)
>
> +/* CML GT1 */
> +#define INTEL_CML_GT1_IDS(info) \
> + INTEL_VGA_DEVICE(0x9B21, info), \
> + INTEL_VGA_DEVICE(0x9BAA, info), \
> + INTEL_VGA_DEVICE(0x9BAB, info), \
> + INTEL_VGA_DEVICE(0x9BAC, info), \
> + INTEL_VGA_DEVICE(0x9BA0, info), \
> + INTEL_VGA_DEVICE(0x9BA5, info), \
> + INTEL_VGA_DEVICE(0x9BA8, info), \
> + INTEL_VGA_DEVICE(0x9BA4, info), \
> + INTEL_VGA_DEVICE(0x9BA2, info)
> +
> +/* CML GT2 */
> +#define INTEL_CML_GT2_IDS(info) \
> + INTEL_VGA_DEVICE(0x9B41, info), \
> + INTEL_VGA_DEVICE(0x9BCA, info), \
> + INTEL_VGA_DEVICE(0x9BCB, info), \
> + INTEL_VGA_DEVICE(0x9BCC, info), \
> + INTEL_VGA_DEVICE(0x9BC0, info), \
> + INTEL_VGA_DEVICE(0x9BC5, info), \
> + INTEL_VGA_DEVICE(0x9BC8, info), \
> + INTEL_VGA_DEVICE(0x9BC4, info), \
> + INTEL_VGA_DEVICE(0x9BC2, info)
> +
> #define INTEL_KBL_IDS(info) \
> INTEL_KBL_GT1_IDS(info), \
> INTEL_KBL_GT2_IDS(info), \
> @@ -436,7 +460,9 @@
> INTEL_WHL_U_GT1_IDS(info), \
> INTEL_WHL_U_GT2_IDS(info), \
> INTEL_WHL_U_GT3_IDS(info), \
> - INTEL_AML_CFL_GT2_IDS(info)
> + INTEL_AML_CFL_GT2_IDS(info), \
> + INTEL_CML_GT1_IDS(info), \
> + INTEL_CML_GT2_IDS(info)
>
> /* CNL */
> #define INTEL_CNL_IDS(info) \
> @@ -469,6 +495,7 @@
> INTEL_VGA_DEVICE(0x8A57, info), \
> INTEL_VGA_DEVICE(0x8A56, info), \
> INTEL_VGA_DEVICE(0x8A71, info), \
> - INTEL_VGA_DEVICE(0x8A70, info)
> + INTEL_VGA_DEVICE(0x8A70, info), \
> + INTEL_VGA_DEVICE(0x8A53, info)
>
> #endif /* _I915_PCIIDS_H */
[-- Attachment #1.2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 488 bytes --]
[-- Attachment #2: Type: text/plain, Size: 159 bytes --]
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply [flat|nested] 15+ messages in thread* Re: [PATCH libdrm] intel: sync i915_pciids.h with kernel
2019-03-22 21:03 ` Souza, Jose
@ 2019-03-25 10:28 ` Jani Nikula
0 siblings, 0 replies; 15+ messages in thread
From: Jani Nikula @ 2019-03-25 10:28 UTC (permalink / raw)
To: Souza, Jose, dri-devel, Srivatsa, Anusha
Cc: De Marchi, Lucas, Argenziano, Antonio
On Fri, 22 Mar 2019, "Souza, Jose" <jose.souza@intel.com> wrote:
> On Fri, 2019-03-22 at 13:35 -0700, Anusha wrote:
>> Straight copy from the kernel file.
>>
>> Add PCI IDs for CML, add additional PCI ID
>> for ICL.
>>
>> Align with kernel commits:
>>
>> a7b4deeb02b97 ("drm/i915/cml: Add CML PCI IDS")
>> 9a751b999d17a ("drm/i915: Add new ICL PCI ID")
>>
>> v2: Do a copy from kernel header (Jose)
>> - Change commit message (Lucas)
>>
>> v3: Add corresponding kernel commit IDs (Antonio)
>
> Not sure if libdrm have a style rule but in i915 we use 12 digits for
> the commit hash, other than that:
Protip, 'dim cite' gives you the references in the right format, or you
can add this to your .gitconfig alias section for a 'git cite' alias:
cite = "!f() { git log -1 '--pretty=format:%H (\"%s\")%n' $1 | sed -e 's/\\([0-f]\\{12\\}\\)[0-f]*/\\1/'; }; f"
BR,
Jani.
>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
>>
>> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
>> Cc: José Roberto de Souza <jose.souza@intel.com>
>> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> ---
>> intel/i915_pciids.h | 31 +++++++++++++++++++++++++++++--
>> 1 file changed, 29 insertions(+), 2 deletions(-)
>>
>> diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
>> index d2fad7b0..291b5e3f 100644
>> --- a/intel/i915_pciids.h
>> +++ b/intel/i915_pciids.h
>> @@ -373,6 +373,30 @@
>> #define INTEL_AML_CFL_GT2_IDS(info) \
>> INTEL_VGA_DEVICE(0x87CA, info)
>>
>> +/* CML GT1 */
>> +#define INTEL_CML_GT1_IDS(info) \
>> + INTEL_VGA_DEVICE(0x9B21, info), \
>> + INTEL_VGA_DEVICE(0x9BAA, info), \
>> + INTEL_VGA_DEVICE(0x9BAB, info), \
>> + INTEL_VGA_DEVICE(0x9BAC, info), \
>> + INTEL_VGA_DEVICE(0x9BA0, info), \
>> + INTEL_VGA_DEVICE(0x9BA5, info), \
>> + INTEL_VGA_DEVICE(0x9BA8, info), \
>> + INTEL_VGA_DEVICE(0x9BA4, info), \
>> + INTEL_VGA_DEVICE(0x9BA2, info)
>> +
>> +/* CML GT2 */
>> +#define INTEL_CML_GT2_IDS(info) \
>> + INTEL_VGA_DEVICE(0x9B41, info), \
>> + INTEL_VGA_DEVICE(0x9BCA, info), \
>> + INTEL_VGA_DEVICE(0x9BCB, info), \
>> + INTEL_VGA_DEVICE(0x9BCC, info), \
>> + INTEL_VGA_DEVICE(0x9BC0, info), \
>> + INTEL_VGA_DEVICE(0x9BC5, info), \
>> + INTEL_VGA_DEVICE(0x9BC8, info), \
>> + INTEL_VGA_DEVICE(0x9BC4, info), \
>> + INTEL_VGA_DEVICE(0x9BC2, info)
>> +
>> #define INTEL_KBL_IDS(info) \
>> INTEL_KBL_GT1_IDS(info), \
>> INTEL_KBL_GT2_IDS(info), \
>> @@ -436,7 +460,9 @@
>> INTEL_WHL_U_GT1_IDS(info), \
>> INTEL_WHL_U_GT2_IDS(info), \
>> INTEL_WHL_U_GT3_IDS(info), \
>> - INTEL_AML_CFL_GT2_IDS(info)
>> + INTEL_AML_CFL_GT2_IDS(info), \
>> + INTEL_CML_GT1_IDS(info), \
>> + INTEL_CML_GT2_IDS(info)
>>
>> /* CNL */
>> #define INTEL_CNL_IDS(info) \
>> @@ -469,6 +495,7 @@
>> INTEL_VGA_DEVICE(0x8A57, info), \
>> INTEL_VGA_DEVICE(0x8A56, info), \
>> INTEL_VGA_DEVICE(0x8A71, info), \
>> - INTEL_VGA_DEVICE(0x8A70, info)
>> + INTEL_VGA_DEVICE(0x8A70, info), \
>> + INTEL_VGA_DEVICE(0x8A53, info)
>>
>> #endif /* _I915_PCIIDS_H */
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH libdrm] intel: sync i915_pciids.h with kernel
@ 2019-02-02 8:07 Rodrigo Vivi
2019-02-04 18:19 ` Lionel Landwerlin
0 siblings, 1 reply; 15+ messages in thread
From: Rodrigo Vivi @ 2019-02-02 8:07 UTC (permalink / raw)
To: mesa-dev; +Cc: José Roberto de Souza, dri-devel, Rodrigo Vivi
Straight copy from the kernel file.
Add more PCI Device IDs for Coffee Lake, Ice Lake,
and Amber Lake. It also include a reorg on Whiskey Lake IDs.
Align with kernel commits:
5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
c0c46ca461f1 ("drm/i915/aml: Add new Amber Lake PCI ID")
c1c8f6fa731b ("drm/i915: Redefine some Whiskey Lake SKUs")
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
intel/i915_pciids.h | 29 +++++++++++++++++++++--------
1 file changed, 21 insertions(+), 8 deletions(-)
diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
index fd965ffb..d2fad7b0 100644
--- a/intel/i915_pciids.h
+++ b/intel/i915_pciids.h
@@ -365,16 +365,20 @@
INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
/* AML/KBL Y GT2 */
-#define INTEL_AML_GT2_IDS(info) \
+#define INTEL_AML_KBL_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
+/* AML/CFL Y GT2 */
+#define INTEL_AML_CFL_GT2_IDS(info) \
+ INTEL_VGA_DEVICE(0x87CA, info)
+
#define INTEL_KBL_IDS(info) \
INTEL_KBL_GT1_IDS(info), \
INTEL_KBL_GT2_IDS(info), \
INTEL_KBL_GT3_IDS(info), \
INTEL_KBL_GT4_IDS(info), \
- INTEL_AML_GT2_IDS(info)
+ INTEL_AML_KBL_GT2_IDS(info)
/* CFL S */
#define INTEL_CFL_S_GT1_IDS(info) \
@@ -390,6 +394,9 @@
INTEL_VGA_DEVICE(0x3E9A, info) /* SRV GT2 */
/* CFL H */
+#define INTEL_CFL_H_GT1_IDS(info) \
+ INTEL_VGA_DEVICE(0x3E9C, info)
+
#define INTEL_CFL_H_GT2_IDS(info) \
INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */
@@ -407,27 +414,29 @@
/* WHL/CFL U GT1 */
#define INTEL_WHL_U_GT1_IDS(info) \
- INTEL_VGA_DEVICE(0x3EA1, info)
+ INTEL_VGA_DEVICE(0x3EA1, info), \
+ INTEL_VGA_DEVICE(0x3EA4, info)
/* WHL/CFL U GT2 */
#define INTEL_WHL_U_GT2_IDS(info) \
- INTEL_VGA_DEVICE(0x3EA0, info)
+ INTEL_VGA_DEVICE(0x3EA0, info), \
+ INTEL_VGA_DEVICE(0x3EA3, info)
/* WHL/CFL U GT3 */
#define INTEL_WHL_U_GT3_IDS(info) \
- INTEL_VGA_DEVICE(0x3EA2, info), \
- INTEL_VGA_DEVICE(0x3EA3, info), \
- INTEL_VGA_DEVICE(0x3EA4, info)
+ INTEL_VGA_DEVICE(0x3EA2, info)
#define INTEL_CFL_IDS(info) \
INTEL_CFL_S_GT1_IDS(info), \
INTEL_CFL_S_GT2_IDS(info), \
+ INTEL_CFL_H_GT1_IDS(info), \
INTEL_CFL_H_GT2_IDS(info), \
INTEL_CFL_U_GT2_IDS(info), \
INTEL_CFL_U_GT3_IDS(info), \
INTEL_WHL_U_GT1_IDS(info), \
INTEL_WHL_U_GT2_IDS(info), \
- INTEL_WHL_U_GT3_IDS(info)
+ INTEL_WHL_U_GT3_IDS(info), \
+ INTEL_AML_CFL_GT2_IDS(info)
/* CNL */
#define INTEL_CNL_IDS(info) \
@@ -452,9 +461,13 @@
INTEL_VGA_DEVICE(0x8A51, info), \
INTEL_VGA_DEVICE(0x8A5C, info), \
INTEL_VGA_DEVICE(0x8A5D, info), \
+ INTEL_VGA_DEVICE(0x8A59, info), \
+ INTEL_VGA_DEVICE(0x8A58, info), \
INTEL_VGA_DEVICE(0x8A52, info), \
INTEL_VGA_DEVICE(0x8A5A, info), \
INTEL_VGA_DEVICE(0x8A5B, info), \
+ INTEL_VGA_DEVICE(0x8A57, info), \
+ INTEL_VGA_DEVICE(0x8A56, info), \
INTEL_VGA_DEVICE(0x8A71, info), \
INTEL_VGA_DEVICE(0x8A70, info)
--
2.20.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH libdrm] intel: sync i915_pciids.h with kernel
2019-02-02 8:07 Rodrigo Vivi
@ 2019-02-04 18:19 ` Lionel Landwerlin
0 siblings, 0 replies; 15+ messages in thread
From: Lionel Landwerlin @ 2019-02-04 18:19 UTC (permalink / raw)
To: Rodrigo Vivi, mesa-dev; +Cc: dri-devel, José Roberto de Souza
On 02/02/2019 08:07, Rodrigo Vivi wrote:
> Straight copy from the kernel file.
>
> Add more PCI Device IDs for Coffee Lake, Ice Lake,
> and Amber Lake. It also include a reorg on Whiskey Lake IDs.
>
> Align with kernel commits:
>
> 5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
> 03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
> c0c46ca461f1 ("drm/i915/aml: Add new Amber Lake PCI ID")
> c1c8f6fa731b ("drm/i915: Redefine some Whiskey Lake SKUs")
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> ---
> intel/i915_pciids.h | 29 +++++++++++++++++++++--------
> 1 file changed, 21 insertions(+), 8 deletions(-)
>
> diff --git a/intel/i915_pciids.h b/intel/i915_pciids.h
> index fd965ffb..d2fad7b0 100644
> --- a/intel/i915_pciids.h
> +++ b/intel/i915_pciids.h
> @@ -365,16 +365,20 @@
> INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
>
> /* AML/KBL Y GT2 */
> -#define INTEL_AML_GT2_IDS(info) \
> +#define INTEL_AML_KBL_GT2_IDS(info) \
> INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
> INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
>
> +/* AML/CFL Y GT2 */
> +#define INTEL_AML_CFL_GT2_IDS(info) \
> + INTEL_VGA_DEVICE(0x87CA, info)
> +
> #define INTEL_KBL_IDS(info) \
> INTEL_KBL_GT1_IDS(info), \
> INTEL_KBL_GT2_IDS(info), \
> INTEL_KBL_GT3_IDS(info), \
> INTEL_KBL_GT4_IDS(info), \
> - INTEL_AML_GT2_IDS(info)
> + INTEL_AML_KBL_GT2_IDS(info)
>
> /* CFL S */
> #define INTEL_CFL_S_GT1_IDS(info) \
> @@ -390,6 +394,9 @@
> INTEL_VGA_DEVICE(0x3E9A, info) /* SRV GT2 */
>
> /* CFL H */
> +#define INTEL_CFL_H_GT1_IDS(info) \
> + INTEL_VGA_DEVICE(0x3E9C, info)
> +
> #define INTEL_CFL_H_GT2_IDS(info) \
> INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
> INTEL_VGA_DEVICE(0x3E94, info) /* Halo GT2 */
> @@ -407,27 +414,29 @@
>
> /* WHL/CFL U GT1 */
> #define INTEL_WHL_U_GT1_IDS(info) \
> - INTEL_VGA_DEVICE(0x3EA1, info)
> + INTEL_VGA_DEVICE(0x3EA1, info), \
> + INTEL_VGA_DEVICE(0x3EA4, info)
>
> /* WHL/CFL U GT2 */
> #define INTEL_WHL_U_GT2_IDS(info) \
> - INTEL_VGA_DEVICE(0x3EA0, info)
> + INTEL_VGA_DEVICE(0x3EA0, info), \
> + INTEL_VGA_DEVICE(0x3EA3, info)
>
> /* WHL/CFL U GT3 */
> #define INTEL_WHL_U_GT3_IDS(info) \
> - INTEL_VGA_DEVICE(0x3EA2, info), \
> - INTEL_VGA_DEVICE(0x3EA3, info), \
> - INTEL_VGA_DEVICE(0x3EA4, info)
> + INTEL_VGA_DEVICE(0x3EA2, info)
>
> #define INTEL_CFL_IDS(info) \
> INTEL_CFL_S_GT1_IDS(info), \
> INTEL_CFL_S_GT2_IDS(info), \
> + INTEL_CFL_H_GT1_IDS(info), \
> INTEL_CFL_H_GT2_IDS(info), \
> INTEL_CFL_U_GT2_IDS(info), \
> INTEL_CFL_U_GT3_IDS(info), \
> INTEL_WHL_U_GT1_IDS(info), \
> INTEL_WHL_U_GT2_IDS(info), \
> - INTEL_WHL_U_GT3_IDS(info)
> + INTEL_WHL_U_GT3_IDS(info), \
> + INTEL_AML_CFL_GT2_IDS(info)
>
> /* CNL */
> #define INTEL_CNL_IDS(info) \
> @@ -452,9 +461,13 @@
> INTEL_VGA_DEVICE(0x8A51, info), \
> INTEL_VGA_DEVICE(0x8A5C, info), \
> INTEL_VGA_DEVICE(0x8A5D, info), \
> + INTEL_VGA_DEVICE(0x8A59, info), \
> + INTEL_VGA_DEVICE(0x8A58, info), \
> INTEL_VGA_DEVICE(0x8A52, info), \
> INTEL_VGA_DEVICE(0x8A5A, info), \
> INTEL_VGA_DEVICE(0x8A5B, info), \
> + INTEL_VGA_DEVICE(0x8A57, info), \
> + INTEL_VGA_DEVICE(0x8A56, info), \
> INTEL_VGA_DEVICE(0x8A71, info), \
> INTEL_VGA_DEVICE(0x8A70, info)
>
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^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2020-08-20 17:25 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-12-10 20:06 [PATCH libdrm] intel: sync i915_pciids.h with kernel José Roberto de Souza
2019-12-12 17:17 ` Matt Roper
2019-12-16 16:52 ` Souza, Jose
-- strict thread matches above, loose matches on Subject: below --
2020-08-20 8:46 Adam Miszczak
2020-08-20 17:24 ` Souza, Jose
2020-06-16 12:37 ramadevi.gandi
2020-03-20 0:38 Swathi Dhanavanthri
2020-03-23 12:04 ` Timo Aaltonen
2019-08-30 20:32 Anusha Srivatsa
2019-09-05 17:54 ` Souza, Jose
2019-03-22 20:35 Anusha
2019-03-22 21:03 ` Souza, Jose
2019-03-25 10:28 ` Jani Nikula
2019-02-02 8:07 Rodrigo Vivi
2019-02-04 18:19 ` Lionel Landwerlin
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