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From: Matthew Auld <matthew.auld@intel.com>
To: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>,
	intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: matthew.brost@intel.com, paulo.r.zanoni@intel.com,
	tvrtko.ursulin@intel.com, jani.nikula@intel.com,
	lionel.g.landwerlin@intel.com, thomas.hellstrom@intel.com,
	jason@jlekstrand.net, andi.shyti@linux.intel.com,
	daniel.vetter@intel.com, christian.koenig@amd.com
Subject: Re: [PATCH 14/16] drm/i915/vm_bind: Handle persistent vmas in execbuf3
Date: Fri, 30 Sep 2022 10:47:48 +0100	[thread overview]
Message-ID: <f9bdd880-d14e-cca7-ab9f-53e6535b4522@intel.com> (raw)
In-Reply-To: <20220928061918.6340-15-niranjana.vishwanathapura@intel.com>

On 28/09/2022 07:19, Niranjana Vishwanathapura wrote:
> Handle persistent (VM_BIND) mappings during the request submission
> in the execbuf3 path.
> 
> Signed-off-by: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com>
> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
> ---
>   .../gpu/drm/i915/gem/i915_gem_execbuffer3.c   | 188 +++++++++++++++++-
>   1 file changed, 187 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer3.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer3.c
> index 92af88bc8deb..1aeeff5e8540 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer3.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer3.c
> @@ -19,6 +19,7 @@
>   #include "i915_gem_vm_bind.h"
>   #include "i915_trace.h"
>   
> +#define __EXEC3_HAS_PIN			BIT_ULL(33)
>   #define __EXEC3_ENGINE_PINNED		BIT_ULL(32)
>   #define __EXEC3_INTERNAL_FLAGS		(~0ull << 32)
>   
> @@ -42,7 +43,9 @@
>    * execlist. Hence, no support for implicit sync.
>    *
>    * The new execbuf3 ioctl only works in VM_BIND mode and the VM_BIND mode only
> - * works with execbuf3 ioctl for submission.
> + * works with execbuf3 ioctl for submission. All BOs mapped on that VM (through
> + * VM_BIND call) at the time of execbuf3 call are deemed required for that
> + * submission.
>    *
>    * The execbuf3 ioctl directly specifies the batch addresses instead of as
>    * object handles as in execbuf2 ioctl. The execbuf3 ioctl will also not
> @@ -58,6 +61,13 @@
>    * So, a lot of code supporting execbuf2 ioctl, like relocations, VA evictions,
>    * vma lookup table, implicit sync, vma active reference tracking etc., are not
>    * applicable for execbuf3 ioctl.
> + *
> + * During each execbuf submission, request fence is added to all VM_BIND mapped
> + * objects with DMA_RESV_USAGE_BOOKKEEP. The DMA_RESV_USAGE_BOOKKEEP usage will
> + * prevent over sync (See enum dma_resv_usage). Note that DRM_I915_GEM_WAIT and
> + * DRM_I915_GEM_BUSY ioctls do not check for DMA_RESV_USAGE_BOOKKEEP usage and
> + * hence should not be used for end of batch check. Instead, the execbuf3
> + * timeline out fence should be used for end of batch check.
>    */
>   
>   /**
> @@ -127,6 +137,23 @@ eb_find_vma(struct i915_address_space *vm, u64 addr)
>   	return i915_gem_vm_bind_lookup_vma(vm, va);
>   }
>   
> +static void eb_scoop_unbound_vma_all(struct i915_address_space *vm)
> +{
> +	struct i915_vma *vma, *vn;
> +
> +	/**
> +	 * Move all unbound vmas back into vm_bind_list so that they are
> +	 * revalidated.
> +	 */
> +	spin_lock(&vm->vm_rebind_lock);
> +	list_for_each_entry_safe(vma, vn, &vm->vm_rebind_list, vm_rebind_link) {
> +		list_del_init(&vma->vm_rebind_link);
> +		if (!list_empty(&vma->vm_bind_link))
> +			list_move_tail(&vma->vm_bind_link, &vm->vm_bind_list);
> +	}
> +	spin_unlock(&vm->vm_rebind_lock);
> +}
> +
>   static int eb_lookup_vma_all(struct i915_execbuffer *eb)
>   {
>   	unsigned int i, current_batch = 0;
> @@ -141,14 +168,121 @@ static int eb_lookup_vma_all(struct i915_execbuffer *eb)
>   		++current_batch;
>   	}
>   
> +	eb_scoop_unbound_vma_all(eb->context->vm);
> +
> +	return 0;
> +}
> +
> +static int eb_lock_vma_all(struct i915_execbuffer *eb)
> +{
> +	struct i915_address_space *vm = eb->context->vm;
> +	struct i915_vma *vma;
> +	int err;
> +
> +	err = i915_gem_object_lock(eb->context->vm->root_obj, &eb->ww);
> +	if (err)
> +		return err;
> +
> +	list_for_each_entry(vma, &vm->non_priv_vm_bind_list,
> +			    non_priv_vm_bind_link) {
> +		err = i915_gem_object_lock(vma->obj, &eb->ww);
> +		if (err)
> +			return err;
> +	}
> +
>   	return 0;
>   }
>   
> +static void eb_release_persistent_vma_all(struct i915_execbuffer *eb,
> +					  bool final)
> +{
> +	struct i915_address_space *vm = eb->context->vm;
> +	struct i915_vma *vma, *vn;
> +
> +	lockdep_assert_held(&vm->vm_bind_lock);
> +
> +	if (!(eb->args->flags & __EXEC3_HAS_PIN))
> +		return;
> +
> +	assert_object_held(vm->root_obj);
> +
> +	list_for_each_entry(vma, &vm->vm_bind_list, vm_bind_link)
> +		__i915_vma_unpin(vma);
> +
> +	eb->args->flags &= ~__EXEC3_HAS_PIN;
> +	if (!final)
> +		return;
> +
> +	list_for_each_entry_safe(vma, vn, &vm->vm_bind_list, vm_bind_link)
> +		if (i915_vma_verify_bind_complete(vma))
> +			list_move_tail(&vma->vm_bind_link, &vm->vm_bound_list);
> +}
> +
>   static void eb_release_vma_all(struct i915_execbuffer *eb, bool final)
>   {
> +	eb_release_persistent_vma_all(eb, final);
>   	eb_unpin_engine(eb);
>   }
>   
> +static int eb_reserve_fence_for_persistent_vma_all(struct i915_execbuffer *eb)
> +{
> +	struct i915_address_space *vm = eb->context->vm;
> +	struct i915_vma *vma;
> +	int ret;
> +
> +	ret = dma_resv_reserve_fences(vm->root_obj->base.resv, 1);
> +	if (ret)
> +		return ret;
> +
> +	list_for_each_entry(vma, &vm->non_priv_vm_bind_list,
> +			    non_priv_vm_bind_link) {
> +		ret = dma_resv_reserve_fences(vma->obj->base.resv, 1);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +static int eb_validate_persistent_vma_all(struct i915_execbuffer *eb)
> +{
> +	struct i915_address_space *vm = eb->context->vm;
> +	struct i915_vma *vma, *last_pinned_vma = NULL;
> +	int ret = 0;
> +
> +	lockdep_assert_held(&vm->vm_bind_lock);
> +	assert_object_held(vm->root_obj);
> +
> +	ret = eb_reserve_fence_for_persistent_vma_all(eb);
> +	if (ret)
> +		return ret;
> +
> +	if (list_empty(&vm->vm_bind_list))
> +		return 0;
> +
> +	list_for_each_entry(vma, &vm->vm_bind_list, vm_bind_link) {
> +		u64 pin_flags = vma->start | PIN_OFFSET_FIXED | PIN_USER;
> +
> +		ret = i915_vma_pin_ww(vma, &eb->ww, 0, 0, pin_flags);
> +		if (ret)
> +			break;
> +
> +		last_pinned_vma = vma;
> +	}
> +
> +	if (ret && last_pinned_vma) {
> +		list_for_each_entry(vma, &vm->vm_bind_list, vm_bind_link) {
> +			__i915_vma_unpin(vma);
> +			if (vma == last_pinned_vma)
> +				break;
> +		}
> +	} else if (last_pinned_vma) {
> +		eb->args->flags |= __EXEC3_HAS_PIN;
> +	}
> +
> +	return ret;
> +}
> +
>   /*
>    * Using two helper loops for the order of which requests / batches are created
>    * and added the to backend. Requests are created in order from the parent to
> @@ -161,8 +295,43 @@ static void eb_release_vma_all(struct i915_execbuffer *eb, bool final)
>   #define for_each_batch_create_order(_eb) \
>   	for (unsigned int i = 0; i < (_eb)->num_batches; ++i)
>   
> +static void __eb_persistent_add_shared_fence(struct drm_i915_gem_object *obj,
> +					     struct dma_fence *fence)
> +{
> +	dma_resv_add_fence(obj->base.resv, fence, DMA_RESV_USAGE_BOOKKEEP);
> +	obj->write_domain = 0;
> +	obj->read_domains |= I915_GEM_GPU_DOMAINS;
> +	obj->mm.dirty = true;
> +}
> +
> +static void eb_persistent_add_shared_fence(struct i915_execbuffer *eb)
> +{
> +	struct i915_address_space *vm = eb->context->vm;
> +	struct dma_fence *fence;
> +	struct i915_vma *vma;
> +
> +	fence = eb->composite_fence ? eb->composite_fence :
> +		&eb->requests[0]->fence;
> +
> +	__eb_persistent_add_shared_fence(vm->root_obj, fence);
> +	list_for_each_entry(vma, &vm->non_priv_vm_bind_list,
> +			    non_priv_vm_bind_link)
> +		__eb_persistent_add_shared_fence(vma->obj, fence);

See: 842d9346b2fd ("drm/i915: Individualize fences before adding to 
dma_resv obj"). Do we not need something similar?

> +}
> +
> +static void eb_move_all_persistent_vma_to_active(struct i915_execbuffer *eb)
> +{
> +	/* Add fence to BOs dma-resv fence list */
> +	eb_persistent_add_shared_fence(eb);
> +}
> +
>   static int eb_move_to_gpu(struct i915_execbuffer *eb)
>   {
> +	lockdep_assert_held(&eb->context->vm->vm_bind_lock);
> +	assert_object_held(eb->context->vm->root_obj);
> +
> +	eb_move_all_persistent_vma_to_active(eb);
> +
>   	/* Unconditionally flush any chipset caches (for streaming writes). */
>   	intel_gt_chipset_flush(eb->gt);
>   
> @@ -478,6 +647,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>   
>   	mutex_lock(&eb.context->vm->vm_bind_lock);
>   
> +lookup_vmas:
>   	err = eb_lookup_vma_all(&eb);
>   	if (err) {
>   		eb_release_vma_all(&eb, true);
> @@ -494,6 +664,22 @@ i915_gem_do_execbuffer(struct drm_device *dev,
>   	/* only throttle once, even if we didn't need to throttle */
>   	throttle = false;
>   
> +	err = eb_lock_vma_all(&eb);
> +	if (err)
> +		goto err_validate;
> +
> +	/**
> +	 * No object unbinds possible once the objects are locked. So,
> +	 * check for any unbinds here, which needs to be scooped up.
> +	 */
> +	if (!list_empty(&eb.context->vm->vm_rebind_list)) {
> +		eb_release_vma_all(&eb, true);
> +		i915_gem_ww_ctx_fini(&eb.ww);
> +		goto lookup_vmas;
> +	}
> +
> +	err = eb_validate_persistent_vma_all(&eb);
> +
>   err_validate:
>   	if (err == -EDEADLK) {
>   		eb_release_vma_all(&eb, false);

  reply	other threads:[~2022-09-30  9:48 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-09-28  6:19 [PATCH 00/16] drm/i915/vm_bind: Add VM_BIND functionality Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 01/16] drm/i915/vm_bind: Expose vm lookup function Niranjana Vishwanathapura
2022-09-28 17:28   ` Matthew Auld
2022-09-28  6:19 ` [PATCH 02/16] drm/i915/vm_bind: Add __i915_sw_fence_await_reservation() Niranjana Vishwanathapura
2022-09-28 17:39   ` Matthew Auld
2022-09-29  5:20     ` Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 03/16] drm/i915/vm_bind: Expose i915_gem_object_max_page_size() Niranjana Vishwanathapura
2022-09-28 17:40   ` Matthew Auld
2022-09-29  5:20     ` Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 04/16] drm/i915/vm_bind: Add support to create persistent vma Niranjana Vishwanathapura
2022-09-28  7:38   ` [Intel-gfx] " Tvrtko Ursulin
2022-09-28 17:05     ` Niranjana Vishwanathapura
2022-09-28 14:44   ` Andi Shyti
2022-09-28 17:07     ` Niranjana Vishwanathapura
2022-09-29 17:04   ` Matthew Auld
2022-09-28  6:19 ` [PATCH 05/16] drm/i915/vm_bind: Implement bind and unbind of object Niranjana Vishwanathapura
2022-09-28  9:43   ` [Intel-gfx] " kernel test robot
2022-09-28 17:52   ` Matthew Auld
2022-09-29  5:24     ` Niranjana Vishwanathapura
2022-09-29  9:03       ` Matthew Auld
2022-09-29 10:51         ` Matthew Auld
2022-09-29 14:24           ` Niranjana Vishwanathapura
2022-09-28 20:06   ` [Intel-gfx] " Welty, Brian
2022-09-29  5:25     ` Niranjana Vishwanathapura
2022-09-29 10:49   ` Matthew Auld
2022-09-29 16:38     ` Niranjana Vishwanathapura
2022-09-29 17:28       ` Matthew Auld
2022-09-29 17:49         ` Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 06/16] drm/i915/vm_bind: Support for VM private BOs Niranjana Vishwanathapura
2022-09-28 17:54   ` Matthew Auld
2022-09-29 14:28     ` Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 07/16] drm/i915/vm_bind: Add support to handle object evictions Niranjana Vishwanathapura
2022-09-29 17:13   ` Matthew Auld
2022-09-28  6:19 ` [PATCH 08/16] drm/i915/vm_bind: Support persistent vma activeness tracking Niranjana Vishwanathapura
2022-09-30 12:00   ` Andi Shyti
2022-09-28  6:19 ` [PATCH 09/16] drm/i915/vm_bind: Add out fence support Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 10/16] drm/i915/vm_bind: Abstract out common execbuf functions Niranjana Vishwanathapura
2022-09-30 10:45   ` Matthew Auld
2022-09-30 16:26     ` Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 11/16] drm/i915/vm_bind: Use common execbuf functions in execbuf path Niranjana Vishwanathapura
2022-09-30 10:47   ` Matthew Auld
2022-09-28  6:19 ` [PATCH 12/16] drm/i915/vm_bind: Implement I915_GEM_EXECBUFFER3 ioctl Niranjana Vishwanathapura
2022-09-29 15:00   ` Matthew Auld
2022-09-29 16:02     ` Niranjana Vishwanathapura
2022-10-03 21:12       ` [Intel-gfx] " Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 13/16] drm/i915/vm_bind: Update i915_vma_verify_bind_complete() Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 14/16] drm/i915/vm_bind: Handle persistent vmas in execbuf3 Niranjana Vishwanathapura
2022-09-30  9:47   ` Matthew Auld [this message]
2022-10-02  6:28     ` Niranjana Vishwanathapura
2022-10-03  8:36       ` Matthew Auld
2022-10-05  5:38         ` Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 15/16] drm/i915/vm_bind: userptr dma-resv changes Niranjana Vishwanathapura
2022-09-28  6:19 ` [PATCH 16/16] drm/i915/vm_bind: Add uapi for user to enable vm_bind_mode Niranjana Vishwanathapura
2022-09-30 10:01   ` Matthew Auld
2022-09-30 16:13     ` Niranjana Vishwanathapura

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