Re: [PATCH v3 5/7] clk: qcom: gcc-msm8916: move gcc_mss_q6_bimc_axi_clk down

From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Marijn Suijten <marijn.suijten@somainline.org>
Cc: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Stephen Boyd <swboyd@chromium.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Taniya Das <quic_tdas@quicinc.com>,
	linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org,
	Konrad Dybcio <konrad.dybcio@somainline.org>
Subject: Re: [PATCH v3 5/7] clk: qcom: gcc-msm8916: move gcc_mss_q6_bimc_axi_clk down
Date: Tue, 28 Jun 2022 15:40:15 +0300	[thread overview]
Message-ID: <eb516b67-9c9e-251b-3fea-8d2830e1ab89@linaro.org> (raw)
In-Reply-To: <20220627211844.6kwk2kyalgyb3ysm@SoMainline.org>

On 28/06/2022 00:18, Marijn Suijten wrote:
> On 2022-06-20 00:27:33, Dmitry Baryshkov wrote:
>> The gcc_mss_q6_bimc_axi_clk clock depends on the bimc_ddr_clk_src clock.
>> Move it down in the file to come after the source clock.
>>
>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
> 
>> ---
>>   drivers/clk/qcom/gcc-msm8916.c | 34 +++++++++++++++++-----------------
>>   1 file changed, 17 insertions(+), 17 deletions(-)
>>
>> diff --git a/drivers/clk/qcom/gcc-msm8916.c b/drivers/clk/qcom/gcc-msm8916.c
>> index 7962edbdbcf6..4d726ca4b0da 100644
>> --- a/drivers/clk/qcom/gcc-msm8916.c
>> +++ b/drivers/clk/qcom/gcc-msm8916.c
>> @@ -2594,23 +2594,6 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = {
>>   	},
>>   };
>>   
>> -static struct clk_branch gcc_mss_q6_bimc_axi_clk = {
>> -	.halt_reg = 0x49004,
>> -	.clkr = {
>> -		.enable_reg = 0x49004,
>> -		.enable_mask = BIT(0),
>> -		.hw.init = &(struct clk_init_data){
>> -			.name = "gcc_mss_q6_bimc_axi_clk",
>> -			.parent_names = (const char *[]){
>> -				"bimc_ddr_clk_src",
>> -			},
>> -			.num_parents = 1,
>> -			.flags = CLK_SET_RATE_PARENT,
>> -			.ops = &clk_branch2_ops,
>> -		},
>> -	},
>> -};
>> -
>>   static struct clk_branch gcc_oxili_ahb_clk = {
>>   	.halt_reg = 0x59028,
>>   	.clkr = {
>> @@ -2860,6 +2843,23 @@ static struct clk_branch gcc_bimc_gpu_clk = {
>>   	},
>>   };
>>   
>> +static struct clk_branch gcc_mss_q6_bimc_axi_clk = {
> 
> How'd you settle on placing it here?  It isn't right below
> bimc_ddr_clk_src, nor the last user of bimc_ddr_clk_src, doesn't seem to
> have any alphabetical or .enable_reg related ordering to the other clks
> either?

Hmm, I was looking for the last bimc_ddr_clk_src user. Let's see if I 
can find a better place then.

> 
>> +	.halt_reg = 0x49004,
>> +	.clkr = {
>> +		.enable_reg = 0x49004,
>> +		.enable_mask = BIT(0),
>> +		.hw.init = &(struct clk_init_data){
>> +			.name = "gcc_mss_q6_bimc_axi_clk",
>> +			.parent_names = (const char *[]){
>> +				"bimc_ddr_clk_src",
>> +			},
>> +			.num_parents = 1,
>> +			.flags = CLK_SET_RATE_PARENT,
>> +			.ops = &clk_branch2_ops,
>> +		},
>> +	},
>> +};
>> +
>>   static struct clk_branch gcc_jpeg_tbu_clk = {
>>   	.halt_reg = 0x12034,
>>   	.clkr = {
>> -- 
>> 2.35.1
>>

-- 
With best wishes
Dmitry