Re: "Fixes" for page flipping under PRIME on AMD & nouveau

From: Mario Kleiner <mario.kleiner.de@gmail.com>
To: "Marek Olšák" <maraeo@gmail.com>, "Michel Dänzer" <michel@daenzer.net>
Cc: "Deucher, Alexander" <alexander.deucher@amd.com>,
	Dave Airlie <airlied@redhat.com>,
	Jerome Glisse <jglisse@redhat.com>,
	Ben Skeggs <bskeggs@redhat.com>,
	dri-devel <dri-devel@lists.freedesktop.org>
Subject: Re: "Fixes" for page flipping under PRIME on AMD & nouveau
Date: Fri, 26 Aug 2016 22:10:40 +0200	[thread overview]
Message-ID: <f823a2b4-b0e1-f857-9f65-f30abc618d57@gmail.com> (raw)
In-Reply-To: <CAAxE2A41KjTP+GvGAt_GuTvJfRsdsqVNPUWD27zKk04UczGD6g@mail.gmail.com>

On 08/18/2016 09:21 PM, Marek Olšák wrote:
> On Thu, Aug 18, 2016 at 4:23 AM, Michel Dänzer <michel@daenzer.net> wrote:
>> Maybe the rasterization as two triangles results in bad PCIe bandwidth
>> utilization. Using the asynchronous DMA engine for these transfers would
>> probably be ideal, but having the 3D engine rasterize a single rectangle
>> (either using the rectangle primitive or a large triangle with scissor)
>> might already help.
>
> There is only one thing that's bad for PCIe when the surface is
> linear: the 3D engine. Disabling all but the first shader engine and
> all but the first 2 RBs should improve performance for blits from VRAM
> to GTT. The closed driver does that, but I don't remember if the
> destination must be linear, must be in GTT, or both. In any case, SDMA
> should still be the best for VRAM->GTT blits.
>
> Marek
>

Friday evening education question:

So if you have multiple render backends active they compete for PCIe bus 
access and some kind of "trashing" happens in the arbitration, 
drastically reducing the bandwidth?

thanks,
-mario
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