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From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
	intel-gfx@lists.freedesktop.org, jani.nikula@intel.com
Subject: Re: [PATCH 4/4] drm/i915: Changes required to enable DSI Video Mode on CHT
Date: 14 May 2015 08:47:02 -0700	[thread overview]
Message-ID: <f90827$kmmna9@orsmga001.jf.intel.com> (raw)
In-Reply-To: <68f58a97b98d6ea8d371f7353cbdfbfd791c087b.1431440230.git.jani.nikula@intel.com>

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6391
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -3              272/272              269/272
ILK                 -1              302/302              301/302
SNB                 -1              315/315              314/315
IVB                                  343/343              343/343
BYT                                  287/287              287/287
BDW                                  317/317              317/317
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*PNV  igt@gem_tiled_pread_pwrite      PASS(3)      FAIL(1)
*PNV  igt@gem_userptr_blits@coherency-sync      PASS(3)      CRASH(1)
*PNV  igt@gem_userptr_blits@coherency-unsync      PASS(3)      CRASH(1)
*ILK  igt@kms_flip@flip-vs-dpms-interruptible      PASS(2)      DMESG_WARN(1)
(dmesg patch applied)drm:intel_pch_fifo_underrun_irq_handler[i915]]*ERROR*PCH_transcoder_A_FIFO_underrun@PCH transcoder A FIFO underrun
 SNB  igt@pm_rpm@dpms-mode-unset-non-lpsp      DMESG_WARN(7)PASS(1)      DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x
Note: You need to pay more attention to line start with '*'
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      parent reply	other threads:[~2015-05-14 15:47 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-12 14:20 [PATCH 0/4] drm/i915/chv dsi pll stuff Jani Nikula
2015-05-12 14:20 ` [PATCH 1/4] drm/i915/dsi: abstract dsi bpp derivation from pixel format Jani Nikula
2015-05-12 14:45   ` Ville Syrjälä
2015-05-13  7:28     ` Jani Nikula
2015-05-12 14:20 ` [PATCH 2/4] drm/i915/dsi: add support for DSI PLL N1 divisor values Jani Nikula
2015-05-12 14:52   ` Ville Syrjälä
2015-05-13  7:35     ` [PATCH v2] " Jani Nikula
2015-05-13  9:17       ` Ville Syrjälä
2015-05-15 11:39       ` shuang.he
2015-05-12 14:20 ` [PATCH 3/4] drm/i915: Support for higher DSI clk Jani Nikula
2015-05-12 16:49   ` Ville Syrjälä
2015-05-12 14:20 ` [PATCH 4/4] drm/i915: Changes required to enable DSI Video Mode on CHT Jani Nikula
2015-05-12 16:42   ` Ville Syrjälä
2015-05-14 15:47   ` shuang.he [this message]

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