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From: Zenghui Yu via <qemu-devel@nongnu.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: <qemu-arm@nongnu.org>, <qemu-devel@nongnu.org>,
	Richard Henderson <richard.henderson@linaro.org>
Subject: Re: [PATCH for-7.1] target/arm: Don't report Statistical Profiling Extension in ID registers
Date: Fri, 12 Aug 2022 10:46:48 +0800	[thread overview]
Message-ID: <fa67cebd-8f47-6406-7b9e-f91369799d26@huawei.com> (raw)
In-Reply-To: <20220811131127.947334-1-peter.maydell@linaro.org>

On 2022/8/11 21:11, Peter Maydell wrote:
> The newly added neoverse-n1 CPU has ID register values which indicate
> the presence of the Statistical Profiling Extension, because the real
> hardware has this feature.  QEMU's TCG emulation does not yet
> implement SPE, though (not even as a minimal stub implementation), so
> guests will crash if they try to use it because the SPE system
> registers don't exist.
> 
> Force ID_AA64DFR0_EL1.PMSVer to 0 in CPU realize for TCG, so that
> we don't advertise to the guest a feature that doesn't exist.
> 
> (We could alternatively do this by editing the value that
> aarch64_neoverse_n1_initfn() sets for this ID register, but
> suppressing the field in realize means we won't re-introduce this bug
> when we add other CPUs that have SPE in hardware, such as the
> Neoverse-V1.)
> 
> An example of a non-booting guest is current mainline Linux (5.19),
> when booting in EL2 on the virt board (ie with -machine
> virtualization=on).
> 
> Reported-by: Zenghui Yu <yuzenghui@huawei.com>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>


      parent reply	other threads:[~2022-08-12  2:49 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-11 13:11 [PATCH for-7.1] target/arm: Don't report Statistical Profiling Extension in ID registers Peter Maydell
2022-08-11 17:01 ` Richard Henderson
2022-08-11 23:45 ` Philippe Mathieu-Daudé via
2022-08-12  2:46 ` Zenghui Yu via [this message]

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