From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 24 Oct 2019 16:34:41 -0000 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by Galois.linutronix.de with esmtps (TLS1.2:RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1iNg4N-00031i-Ug for speck@linutronix.de; Thu, 24 Oct 2019 18:34:40 +0200 Received: by mail-wm1-x32d.google.com with SMTP id q70so3576908wme.1 for ; Thu, 24 Oct 2019 09:34:39 -0700 (PDT) Received: from 640k.localdomain ([93.56.166.5]) by smtp.gmail.com with ESMTPSA id l9sm2808179wme.45.2019.10.24.09.34.33 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 24 Oct 2019 09:34:33 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Subject: [MODERATED] [PATCH v7 2/5] NX 2 Date: Thu, 24 Oct 2019 18:34:27 +0200 Message-Id: <1571934870-34323-3-git-send-email-pbonzini@redhat.com> In-Reply-To: <1571934870-34323-1-git-send-email-pbonzini@redhat.com> References: <1571934870-34323-1-git-send-email-pbonzini@redhat.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 To: speck@linutronix.de List-ID: From: Pawan Gupta Subject: [PATCH v7 2/5] x86/cpu: Add Tremont to the cpu vulnerability whitelist This patch adds new cpu family ATOM_TREMONT_D to the cpu vunerability whitelist. ATOM_TREMONT_D is not affected by X86_BUG_ITLB_MULTIHIT. There may be more bugs not affecting ATOM_TREMONT_D which are not known at this point and could be added later. Signed-off-by: Pawan Gupta Signed-off-by: Paolo Bonzini --- arch/x86/kernel/cpu/common.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index fc00b2349a9f..c652ca9dc046 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1074,6 +1074,8 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) * good enough for our purposes. */ + VULNWL_INTEL(ATOM_TREMONT_D, NO_ITLB_MULTIHIT), + /* AMD Family 0xf - 0x12 */ VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT), VULNWL_AMD(0x10, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT), -- 1.8.3.1