From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (146.0.238.70:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 27 Feb 2019 15:37:33 -0000 Received: from localhost ([127.0.0.1] helo=nanos.tec.linutronix.de) by Galois.linutronix.de with esmtp (Exim 4.80) (envelope-from ) id 1gz1Gw-0001Zz-Cn for speck@linutronix.de; Wed, 27 Feb 2019 16:37:26 +0100 Message-Id: <20190227152037.098146619@linutronix.de> Date: Wed, 27 Feb 2019 16:09:40 +0100 From: Thomas Gleixner References: <20190227150939.605235753@linutronix.de> MIME-Version: 1.0 Subject: [patch V5 01/14] MDS basics 1 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: Subject: [patch V5 01/14] x86/speculation: Add INTEL_FAM6_ATOM_AIRMONT_MID to SSB whitelist From: Thomas Gleixner AIRMONT is not affected by SSB, but AIRMONT_MID is according to the white list. This does not make sense as the SILVERMONT/AIRMONT vulnerabilities are identical otherwise. Also the Intel website which lists the affected CPUs does not have AIRMONT_MID on the list. Add it to the whitelist. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/common.c | 1 + 1 file changed, 1 insertion(+) --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -971,6 +971,7 @@ static const __initconst struct x86_cpu_ static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = { { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT }, + { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT_MID }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT_X }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT_MID }, { X86_VENDOR_INTEL, 6, INTEL_FAM6_CORE_YONAH },