From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 26 Sep 2019 01:21:11 -0000 Received: from mga06.intel.com ([134.134.136.31]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1iDISz-0005Qr-JN for speck@linutronix.de; Thu, 26 Sep 2019 03:21:10 +0200 Date: Wed, 25 Sep 2019 18:15:43 -0700 From: Pawan Gupta Subject: [MODERATED] Re: [PATCH v4 06/10] TAAv4 6 Message-ID: <20190926011543.GE16811@guptapadev.amr> References: <4FDE1DEB-A4FA-46A7-B015-2C6CEE1B3975@oracle.com> MIME-Version: 1.0 In-Reply-To: <4FDE1DEB-A4FA-46A7-B015-2C6CEE1B3975@oracle.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Wed, Sep 25, 2019 at 05:10:54PM -0400, speck for Kanth Ghatraju wrote: > > > > On Sep 3, 2019, at 5:16 PM, speck for Pawan Gupta wrote: > > > > From: Pawan Gupta > > Subject: [PATCH v4 06/10] x86/speculation/taa: Add mitigation for TSX Async > > Abort > > > > TSX Async Abort (TAA) is a side channel attack on internal buffers in > > some Intel processors similar to Microachitectural Data Sampling (MDS). > > In this case certain loads may speculatively pass invalid data to > > dependent operations when an asynchronous abort condition is pending in > > a TSX transaction. This includes loads with no fault or assist > > condition. Such loads may speculatively expose stale data from the > > uarch data structures as in MDS. Scope of exposure is within the > > same-thread and cross-thread. This issue affects all current processors > > that support TSX. > > > > On CPUs which have their IA32_ARCH_CAPABILITIES MSR bit MDS_NO=0 and the > > MDS mitigation is clearing the CPU buffers using VERW, there is no > > additional mitigation needed for TAA. > Could you please explicitly state that for the processors that enumerate MD_CLEAR and using the VERW instruction or L1D_FLUSH command to mitigate MDS, no additional mitigation is required. Thanks. L1D_FLUSH also clears the TAA affected CPU buffers, I will add this. Thanks, Pawan