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From: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
To: speck@linutronix.de
Subject: [MODERATED] Re: [PATCH v4 03/10] TAAv4 3
Date: Thu, 26 Sep 2019 00:15:55 -0700	[thread overview]
Message-ID: <20190926071554.GA12539@guptapadev.amr> (raw)
In-Reply-To: <20190926023445.afjeaizeloehi6bn@treble>

On Wed, Sep 25, 2019 at 09:34:45PM -0500, speck for Josh Poimboeuf wrote:
> On Wed, Sep 25, 2019 at 06:13:05PM -0700, speck for Pawan Gupta wrote:
> > > > > > +static int __init tsx_cmdline(char *str)
> > > > > > +{
> > > > > > +	if (!str)
> > > > > > +		return -EINVAL;
> > > > > > +
> > > > > > +	if (!strcmp(str, "on"))
> > > > > > +		tsx_ctrl_state = TSX_CTRL_ENABLE;
> > > > > > +	else if (!strcmp(str, "off"))
> > > > > > +		tsx_ctrl_state = TSX_CTRL_DISABLE;
> > > > > > +
> > > > > > +	return 0;
> > > > > > +}
> > > > > > +early_param("tsx", tsx_cmdline);
> > > > > 
> > > > > Hmm...  Let's say I have a non-TSX system.  I specify tsx=on.  This will
> > > > > set tsx_ctrl_state=TSX_CTRL_ENABLE, then tsx_ctrl_check_support() will
> > > > > set it to tsx_ctrl_state=TSX_CTRL_NOT_SUPPORTED.
> > > > > 
> > > > > I *think* this all works, but I'd love a comment or two about it.  Maybe
> > > > > even something that makes it clear that tsx_en/disable() are both only
> > > > > called when TSX *AND* TSX_CTRL_MSR are supported.
> > > > > 
> > > > > This is all kinda weird and confusing because we're doing this all
> > > > > without the X86_FEATURE bits for TSX.
> > > > 
> > > > If we add another X86_FEATURE bit it will have exact same state as
> > > > X86_FEATURE_RTM.  Do we really need this?
> > > 
> > > How about moving the tsx_init() call to early_init_intel()?  Then you'd
> > > be able to check the feature bit above.  And that might make the
> > > ordering a little easier to follow.
> > 
> > Sorry, I am failing to understand how it would make a difference.
> > early_init_intel() is also called from init_init().
> 
> Regardless, shouldn't tsx_init() at least be called before
> cpu_set_bug_bits(), so that X86_BUG_TAA can get set appropriately?

X86_BUG_TAA should be set even when tsx_init() disables TSX. This is to
indicate that the CPU has the bug but was mitigated by disabling TSX.
That is why we are calling cpu_set_bug_bits() first to set X86_BUG_TAA
and then disabling TSX in tsx_init(). Moreover cpu_set_bug_bits() is
called only by the boot-cpu, and tsx_init() is called per-cpu to disable
TSX on each CPU.

> In that case, instead of early_param(), tsx_init() could just use
> cmdline_find_option() to find the 'tsx=' option.  That would also have
> the advantage of making it much easier to untangle the initialization
> order.

Thanks for the suggestion. Does this look okay?

static enum tsx_ctrl_states {
	TSX_CTRL_ENABLE,
	TSX_CTRL_DISABLE,
	TSX_CTRL_NOT_SUPPORTED,
} tsx_ctrl_state = TSX_CTRL_NOT_SUPPORTED;

static bool tsx_ctrl_is_supported(void)
{
	u64 ia32_cap = read_ia32_arch_cap();

	/*
	 * TSX is controlled via MSR_IA32_TSX_CTRL.  However,
	 * support for this MSR is enumerated by ARCH_CAP_TSX_MSR bit
	 * in MSR_IA32_ARCH_CAPABILITIES.
	 */
	return !!(ia32_cap & ARCH_CAP_TSX_CTRL_MSR);
}

void tsx_init(struct cpuinfo_x86 *c)
{
	char arg[20];
	int ret;

	/* return if TSX_CTRL is not supported */
	if (!tsx_ctrl_is_supported())
		return;

	ret = cmdline_find_option(boot_command_line, "tsx", arg, sizeof(arg));
	if (ret >= 0) {
		if (!strcmp(arg, "on"))
			tsx_ctrl_state = TSX_CTRL_ENABLE;
		else if (!strcmp(arg, "off"))
			tsx_ctrl_state = TSX_CTRL_DISABLE;
		else
			pr_info("tsx: invalid option, defaulting to off\n");
	}

	/*
	 * If user provided an invalid option or tsx= is not provided on cmdline,
	 * default to TSX_CTRL_DISABLE. This is because on certain processors
	 * TSX may be used as part of a speculative side channel attack.
	 */
	if (tsx_ctrl_state == TSX_CTRL_NOT_SUPPORTED)
		tsx_ctrl_state = TSX_CTRL_DISABLE;

	switch (tsx_ctrl_state) {
	case TSX_CTRL_DISABLE:
		tsx_disable();
		[...]

> If early_init_intel() isn't the right spot, then maybe
> early_identify_cpu().

early_identify_cpu() is called for other vendors as well, I think
init_intel() is the ideal place for calling an Intel specific function.
Why do we want to move tsx_init() from init_intel()?

Thanks,
Pawan

  reply	other threads:[~2019-09-26  7:21 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <cover.1567543894.git.pawan.kumar.gupta@linux.intel.com>
2019-09-23 12:47 ` [MODERATED] Re: [PATCH v4 01/10] TAAv4 1 Borislav Petkov
     [not found] ` <20190904060028.GD7212@kroah.com>
     [not found]   ` <20190906072835.GD13480@guptapadev.amr>
     [not found]     ` <20190906092727.GA16843@kroah.com>
     [not found]       ` <20190910184223.GA7543@guptapadev.amr>
     [not found]         ` <20190910223334.GA21301@kroah.com>
     [not found]           ` <20190910233449.GA10041@agluck-desk2.amr.corp.intel.com>
2019-09-23 19:10             ` [MODERATED] Re: [PATCH v4 04/10] TAAv4 4 Greg KH
     [not found]           ` <20190911023223.GA8305@guptapadev.amr>
2019-09-23 19:13             ` Greg KH
2019-09-23 22:25               ` Pawan Gupta
2019-09-24  5:04                 ` Greg KH
2019-09-24 10:48                   ` Jiri Kosina
2019-09-24 13:31                     ` Greg KH
2019-09-24 13:38                       ` Jiri Kosina
2019-09-24 13:47                         ` Greg KH
2019-09-24 23:25                   ` Pawan Gupta
2019-09-27  7:01                     ` Greg KH
2019-09-25 21:10 ` [MODERATED] Re: [PATCH v4 06/10] TAAv4 6 Kanth Ghatraju
2019-09-25 21:11   ` [MODERATED] [AUTOREPLY] [AUTOREPLY] Automatic reply: " Hatle, Mark
2019-09-26  1:15   ` [MODERATED] " Pawan Gupta
     [not found] ` <20190904055711.GC7212@kroah.com>
     [not found]   ` <nycvar.YFH.7.76.1909040759580.31470@cbobk.fhfr.pm>
     [not found]     ` <20190904061155.GI7212@kroah.com>
     [not found]       ` <20190904075846.GD1321@guptapadev.amr>
     [not found]         ` <20190904084306.GA4925@kroah.com>
     [not found]           ` <20190904112758.GP3838@dhcp22.suse.cz>
2019-09-25 22:05             ` [MODERATED] Re: ***UNCHECKED*** Re: [PATCH v4 03/10] TAAv4 3 Josh Poimboeuf
2019-10-01  0:20               ` [MODERATED] " Pawan Gupta
2019-10-02 14:55                 ` Borislav Petkov
2019-10-05  5:16                   ` Pawan Gupta
2019-10-08  2:59                     ` Josh Poimboeuf
2019-10-08  6:15                       ` Pawan Gupta
2019-10-08 18:06                       ` Dave Hansen
2019-10-08 18:36                         ` [MODERATED] Re: ***UNCHECKED*** " Jiri Kosina
     [not found] ` <20190904055406.GA7212@kroah.com>
     [not found]   ` <20190904074326.GB1321@guptapadev.amr>
     [not found]     ` <bfe6f7e0-22db-ce4d-ac3a-875482b43489@intel.com>
2019-09-25 22:13       ` [MODERATED] Re: [PATCH v4 02/10] TAAv4 2 Josh Poimboeuf
2019-09-26  0:46         ` Pawan Gupta
2019-09-25 22:30 ` Josh Poimboeuf
2019-09-30 23:26   ` Pawan Gupta
2019-09-30 23:32     ` [MODERATED] [AUTOREPLY] [MODERATED] [AUTOREPLY] Automatic reply: " James, Hengameh M
     [not found] ` <5b6df5ee-a5b7-c281-de29-af6544b8abb6@intel.com>
     [not found]   ` <20190906074645.GE13480@guptapadev.amr>
2019-09-25 22:48     ` [MODERATED] Re: [PATCH v4 03/10] TAAv4 3 Josh Poimboeuf
2019-09-25 23:12       ` Dave Hansen
2019-09-25 23:22         ` Andrew Cooper
2019-09-26  1:13       ` Pawan Gupta
2019-09-26  2:34         ` Josh Poimboeuf
2019-09-26  7:15           ` Pawan Gupta [this message]
2019-09-26 13:54             ` Josh Poimboeuf
2019-09-26 17:57               ` Pawan Gupta
     [not found] ` <d6fd9ad7-79f7-aab9-db31-a9a2ca03aa10@intel.com>
     [not found]   ` <20190906080828.GF13480@guptapadev.amr>
     [not found]     ` <00170736-0d97-4a48-2141-ffba4bb67199@intel.com>
2019-09-25 22:58       ` [MODERATED] Re: [PATCH v4 04/10] TAAv4 4 Josh Poimboeuf
2019-09-26  0:48         ` Pawan Gupta
2019-09-25 23:06 ` [MODERATED] Re: [PATCH v4 06/10] TAAv4 6 Josh Poimboeuf
2019-09-30 23:00   ` Pawan Gupta
2019-10-01 18:26 ` [MODERATED] Re: [PATCH v4 05/10] TAAv4 5 Pawan Gupta

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