From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 08 Oct 2019 06:16:29 -0000 Received: from mga14.intel.com ([192.55.52.115]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1iHinM-0002vT-12 for speck@linutronix.de; Tue, 08 Oct 2019 08:16:28 +0200 Date: Mon, 7 Oct 2019 23:10:40 -0700 From: Pawan Gupta Subject: [MODERATED] Re: [PATCH v5 09/11] TAAv5 9 Message-ID: <20191008061040.GH5154@guptapadev.amr> References: <20191008025707.ykeeheocguh6jl52@treble> MIME-Version: 1.0 In-Reply-To: <20191008025707.ykeeheocguh6jl52@treble> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Mon, Oct 07, 2019 at 09:57:07PM -0500, speck for Josh Poimboeuf wrote: > On Fri, Oct 04, 2019 at 11:34:31PM -0700, speck for Pawan Gupta wrote: > > Transactional Synchronization Extensions (TSX) is an extension to the > > x86 instruction set architecture (ISA) that adds Hardware Transactional > > Memory (HTM) support. Changing TSX state currently requires a reboot. > > This may not be desirable when rebooting imposes a huge penalty. > > This is still missing a real world justification for the added > complexity. Don't production users typically know at boot time whether > they plan to use TSX? I am not sure about this. > It looks like this patch should be combined with patch 10, since > otherwise this patch causes a regression in the sysfs mitigation > reporting, right? > > And again... this patch needs to be last. Even after the documentation. > If it triggers documentation changes then those changes should be > separated out and included in this patch. Otherwise, this patch may > block the merging of the documentation patch. Ok. Thanks, Pawan