From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 15 Oct 2019 19:38:12 -0000 Received: from youngberry.canonical.com ([91.189.89.112]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_128_CBC_SHA1:128) (Exim 4.80) (envelope-from ) id 1iKSe2-0006j5-Rb for speck@linutronix.de; Tue, 15 Oct 2019 21:38:11 +0200 Received: from [184.169.45.4] (helo=elm) by youngberry.canonical.com with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.86_2) (envelope-from ) id 1iKSdw-000365-H1 for speck@linutronix.de; Tue, 15 Oct 2019 19:38:05 +0000 Date: Tue, 15 Oct 2019 14:37:57 -0500 From: Tyler Hicks Subject: [MODERATED] Re: [PATCH v6 2/5] NX 2 Message-ID: <20191015193754.GB31070@elm> References: <1570790416-25882-1-git-send-email-pbonzini@redhat.com> <1570790416-25882-3-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 In-Reply-To: <1570790416-25882-3-git-send-email-pbonzini@redhat.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On 2019-10-11 12:40:13, speck for Paolo Bonzini wrote: > > This patch adds new cpu family ATOM_TREMONT_X to the cpu vunerability > whitelist. ATOM_TREMONT_X is not affected by X86_BUG_ITLB_MULTIHIT. There > may be more bugs not affecting ATOM_TREMONT_X which are not known at > this point and could be added later. Please run s/TREMONT_X/TREMONT_D/ across the patch description to match the code after commit 5ebb34edbefa ("x86/intel: Aggregate microserver naming"). Tyler > > Signed-off-by: Pawan Gupta > Signed-off-by: Paolo Bonzini > --- > arch/x86/kernel/cpu/common.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c > index fc00b2349a9f..c652ca9dc046 100644 > --- a/arch/x86/kernel/cpu/common.c > +++ b/arch/x86/kernel/cpu/common.c > @@ -1074,6 +1074,8 @@ static void identify_cpu_without_cpuid(struct cpuinfo_x86 *c) > * good enough for our purposes. > */ > > + VULNWL_INTEL(ATOM_TREMONT_D, NO_ITLB_MULTIHIT), > + > /* AMD Family 0xf - 0x12 */ > VULNWL_AMD(0x0f, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT), > VULNWL_AMD(0x10, NO_MELTDOWN | NO_SSB | NO_L1TF | NO_MDS | NO_SWAPGS | NO_ITLB_MULTIHIT), > -- > 1.8.3.1