From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 22 Oct 2019 20:02:39 -0000 Received: from mga05.intel.com ([192.55.52.43]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1iN0MY-00060w-00 for speck@linutronix.de; Tue, 22 Oct 2019 22:02:38 +0200 Date: Tue, 22 Oct 2019 13:02:35 -0700 From: "Luck, Tony" Subject: [MODERATED] Re: [PATCH v7 04/10] TAAv7 4 Message-ID: <20191022200235.GA26744@agluck-desk2.amr.corp.intel.com> References: <20191022165112.GK31458@zn.tnic> <20191022170230.GM31458@zn.tnic> <20191022180032.GF29216@guptapadev.amr> <20191022181215.GP31458@zn.tnic> <20191022191614.GA26396@agluck-desk2.amr.corp.intel.com> <20191022192820.GU31458@zn.tnic> MIME-Version: 1.0 In-Reply-To: <20191022192820.GU31458@zn.tnic> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Tue, Oct 22, 2019 at 09:28:20PM +0200, speck for Borislav Petkov wrote: > Or, a completely different idea: I wonder if we could merge the two > options like we do for l1tf= for example where we have > > l1tf=, > > and then do: > > tsx=on,async_abort_full > tsx=on,async_abort_full,nosmt > tsx=off > > That should even diminish the number of combinations because once you've > supplied "tsx=off" for example, async_abort doesn't matter. At first glance I find that more confusing that helpful. Perspective: TAA is an issue that affects ~3 CPU models. It will be a non-issue on future models. TSX control is a new CPU feature control that happens to begin with those three models, but will continue to be present on future CPU models. -Tony