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From: mark gross <mgross@linux.intel.com>
To: speck@linutronix.de
Subject: [MODERATED] Re: [PATCH 0/2] more sampling fun 0
Date: Wed, 19 Feb 2020 17:53:49 -0800	[thread overview]
Message-ID: <20200220015349.GA58564@mtg-dev.jf.intel.com> (raw)
In-Reply-To: <cover.1582152322.git.mgross@linux.intel.com>

Sorry for the partial sequence.  I'm not sure where the problem is and will
follow up with IT to see if its on my end.

--mark

On Wed, Feb 19, 2020 at 02:45:22PM -0800, speck for mark gross wrote:
> From: mark gross <mgross@linux.intel.com>
> Subject: [PATCH 0/2] Special Register Buffer Data Sampling patch set 
> 
> Special Register Buffer Data Sampling is a sampling type of vulnerability that
> leaks data across cores sharing the HW-RNG for vulnerable processors.
> 
> This leak is fixed by a microcode update and is enabled by default.
> 
> This new microcode serializes processor access during execution of RDRAND
> or RDSEED. It ensures that the shared buffer is overwritten before it
> is released for reuse.
> 
> The mitigation impacts the throughput of the RDRAND and RDSEED instructions
> and latency of RT processing running on the socket while executing RDRAND or
> RDSEED.  The micro bechmark of calling RDRAND many times shows a 10x slowdown.
> 
> This patch set enables kernel command line control of this mitigation and
> exports vulnerability and mitigation status.
> 
> This patch set includes 2 patches:
> The first patch updates cpu_vuln_whitelist with support for a 16 bit field for
> enumerating based on stepping as well as vendor, family, model.
> 
> The second patch enables the command line control of the mitigation as well as
> the sysfs export of vulnerability status.
> 
> The documentation patch is pending on the official white paper to be complete
> such that I can make sure the in tree documentation is consistent with the
> white paper.
> 
> The microcode defaults to enabling the mitigation.
> 
> mark gross (2):
>   Add capability to specify a range of steppings in the vulnerability
>     white list structure.
>   WIP SRBDS mitigation enabling.
> 
>  arch/x86/include/asm/cpu_device_id.h | 12 ++++
>  arch/x86/include/asm/cpufeatures.h   |  3 +
>  arch/x86/include/asm/msr-index.h     |  4 ++
>  arch/x86/kernel/cpu/bugs.c           | 84 ++++++++++++++++++++++++++++
>  arch/x86/kernel/cpu/common.c         | 52 ++++++++++++-----
>  arch/x86/kernel/cpu/cpu.h            | 10 ++++
>  arch/x86/kernel/cpu/intel.c          |  2 +
>  arch/x86/kernel/cpu/match.c          | 26 +++++++++
>  drivers/base/cpu.c                   |  8 +++
>  9 files changed, 187 insertions(+), 14 deletions(-)
> 
> -- 
> 2.17.1

  reply	other threads:[~2020-02-20  1:53 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-19 22:45 [MODERATED] " mark gross
2020-02-20  1:53 ` mark gross [this message]
2020-02-20  8:14 ` [MODERATED] " Greg KH
2020-02-20 14:27   ` Greg KH
2020-02-20 15:40     ` mark gross
2020-02-20 16:18       ` Greg KH
2020-02-20 14:55   ` Andi Kleen
2020-02-20 15:05     ` Greg KH
2020-02-20 16:55       ` Andi Kleen
2020-02-20 21:51     ` Josh Poimboeuf
2020-02-20 22:15       ` Andi Kleen
2020-02-20 22:59         ` Kees Cook
2020-02-20 15:09   ` mark gross
2020-02-28 16:21   ` [MODERATED] Additional sampling fun Borislav Petkov
2020-02-28 16:34     ` [MODERATED] " Greg KH
2020-02-28 17:38       ` mark gross
2020-02-28 17:44         ` Thomas Gleixner
2020-02-28 18:09           ` [MODERATED] " Luck, Tony
2020-02-28 18:40             ` Borislav Petkov
2020-02-28 21:53             ` Thomas Gleixner
2020-03-03  1:03               ` [MODERATED] " Luck, Tony

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