From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 20 Feb 2020 01:53:54 -0000 Received: from mga11.intel.com ([192.55.52.93]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1j4b2H-0008Uk-5l for speck@linutronix.de; Thu, 20 Feb 2020 02:53:53 +0100 Date: Wed, 19 Feb 2020 17:53:49 -0800 From: mark gross Subject: [MODERATED] Re: [PATCH 0/2] more sampling fun 0 Message-ID: <20200220015349.GA58564@mtg-dev.jf.intel.com> Reply-To: mgross@linux.intel.com References: MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: Sorry for the partial sequence. I'm not sure where the problem is and will follow up with IT to see if its on my end. --mark On Wed, Feb 19, 2020 at 02:45:22PM -0800, speck for mark gross wrote: > From: mark gross > Subject: [PATCH 0/2] Special Register Buffer Data Sampling patch set > > Special Register Buffer Data Sampling is a sampling type of vulnerability that > leaks data across cores sharing the HW-RNG for vulnerable processors. > > This leak is fixed by a microcode update and is enabled by default. > > This new microcode serializes processor access during execution of RDRAND > or RDSEED. It ensures that the shared buffer is overwritten before it > is released for reuse. > > The mitigation impacts the throughput of the RDRAND and RDSEED instructions > and latency of RT processing running on the socket while executing RDRAND or > RDSEED. The micro bechmark of calling RDRAND many times shows a 10x slowdown. > > This patch set enables kernel command line control of this mitigation and > exports vulnerability and mitigation status. > > This patch set includes 2 patches: > The first patch updates cpu_vuln_whitelist with support for a 16 bit field for > enumerating based on stepping as well as vendor, family, model. > > The second patch enables the command line control of the mitigation as well as > the sysfs export of vulnerability status. > > The documentation patch is pending on the official white paper to be complete > such that I can make sure the in tree documentation is consistent with the > white paper. > > The microcode defaults to enabling the mitigation. > > mark gross (2): > Add capability to specify a range of steppings in the vulnerability > white list structure. > WIP SRBDS mitigation enabling. > > arch/x86/include/asm/cpu_device_id.h | 12 ++++ > arch/x86/include/asm/cpufeatures.h | 3 + > arch/x86/include/asm/msr-index.h | 4 ++ > arch/x86/kernel/cpu/bugs.c | 84 ++++++++++++++++++++++++++++ > arch/x86/kernel/cpu/common.c | 52 ++++++++++++----- > arch/x86/kernel/cpu/cpu.h | 10 ++++ > arch/x86/kernel/cpu/intel.c | 2 + > arch/x86/kernel/cpu/match.c | 26 +++++++++ > drivers/base/cpu.c | 8 +++ > 9 files changed, 187 insertions(+), 14 deletions(-) > > -- > 2.17.1