From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 07 Apr 2020 12:40:04 -0000 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120] helo=us-smtp-1.mimecast.com) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1jLnWM-0005uF-BF for speck@linutronix.de; Tue, 07 Apr 2020 14:40:02 +0200 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 1E6901005510 for ; Tue, 7 Apr 2020 12:39:58 +0000 (UTC) Received: from treble (ovpn-116-24.rdu2.redhat.com [10.10.116.24]) by smtp.corp.redhat.com (Postfix) with ESMTPS id BF68E5C28E for ; Tue, 7 Apr 2020 12:39:57 +0000 (UTC) Date: Tue, 7 Apr 2020 07:39:55 -0500 From: Josh Poimboeuf Subject: [MODERATED] Re: [PATCH 2/3] V5 more sampling fun 2 Message-ID: <20200407123955.ejjkigwkgfm2v4dt@treble> References: <20200406220714.q2jzjftqlxqnhco7@treble> <20200407003456.GA58233@mtg-dev.jf.intel.com> MIME-Version: 1.0 In-Reply-To: <20200407003456.GA58233@mtg-dev.jf.intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Mon, Apr 06, 2020 at 05:34:56PM -0700, speck for mark gross wrote: > On Mon, Apr 06, 2020 at 05:07:14PM -0500, speck for Josh Poimboeuf wrote: > > > + /* > > > + * Check to see if this is one of the MDS_NO systems supporting > > > + * TSX that are only exposed to SRBDS when TSX is enabled. > > > + */ > > > + ia32_cap = x86_read_arch_cap_msr(); > > > + if (ia32_cap & ARCH_CAP_MDS_NO) { > > > + if (!boot_cpu_has(X86_FEATURE_RTM)) > > > + srbds_mitigation = SRBDS_NOT_AFFECTED_TSX_OFF; > > > + } > > > > A 'goto out' would be helpful here; then the TSX_OFF checks below aren't > > needed and the flow is simplified. > a goto out would mess up the hypervisor check but, I'll add the goto for the > mid function returns that set the srbds_mitigation value. Just to clarify, I was thinking something like: ia32_cap = x86_read_arch_cap_msr(); if ((ia32_cap & ARCH_CAP_MDS_NO) && !boot_cpu_has(X86_FEATURE_RTM)) { srbds_mitigation = SRBDS_NOT_AFFECTED_TSX_OFF; goto out; } As far as I can tell, that doesn't mess up the hypervisor check, since it only sets SRBDS_HYPERVISOR if TSX_OFF isn't set. > > > > + > > > + if (boot_cpu_has(X86_FEATURE_HYPERVISOR)) { > > > + if (srbds_mitigation != SRBDS_NOT_AFFECTED_TSX_OFF) > > > + srbds_mitigation = SRBDS_HYPERVISOR; > > > + return; > > > + } > > > + > > > +/* > > > + * List affected CPU's for issues that cannot be enumerated. > > > + */ > > > > I don't understand the comment, SRBDS seems to be enumerated above. > hmm, how about I remove the comment? Sounds good to me. -- Josh