From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 23 Apr 2020 16:38:35 -0000 Received: from mga14.intel.com ([192.55.52.115]) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1jRery-0001aY-Kl for speck@linutronix.de; Thu, 23 Apr 2020 18:38:35 +0200 Received: from localhost (mtg-dev.jf.intel.com [10.54.74.10]) by smtp.ostc.intel.com (Postfix) with ESMTP id 099D36363 for ; Thu, 23 Apr 2020 16:38:31 +0000 (UTC) Date: Thu, 23 Apr 2020 09:38:31 -0700 From: mark gross Subject: [MODERATED] Re: doc fix Message-ID: <20200423163831.GA90742@mtg-dev.jf.intel.com> Reply-To: mgross@linux.intel.com References: <20200422203506.fks53pgkuq5tawdu@treble> MIME-Version: 1.0 In-Reply-To: <20200422203506.fks53pgkuq5tawdu@treble> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Wed, Apr 22, 2020 at 03:35:06PM -0500, speck for Josh Poimboeuf wrote: > From: Josh Poimboeuf > Subject: [PATCH] x86/speculation: Add Ivy Bridge to affected list > > Make the docs match the code. > > Signed-off-by: Josh Poimboeuf > --- > .../hw-vuln/special-register-buffer-data-sampling.rst | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst b/Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst > index 6a473da80b62..47b1b3afac99 100644 > --- a/Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst > +++ b/Documentation/admin-guide/hw-vuln/special-register-buffer-data-sampling.rst > @@ -27,6 +27,8 @@ by software using TSX_CTRL_MSR otherwise they are not affected. > ============= ============ ======== > common name Family_Model Stepping > ============= ============ ======== > + IvyBridge 06_3AH All > + > Haswell 06_3CH All > Haswell_L 06_45H All > Haswell_G 06_46H All > @@ -37,9 +39,8 @@ by software using TSX_CTRL_MSR otherwise they are not affected. > Skylake_L 06_4EH All > Skylake 06_5EH All > > - Kabylake_L 06_8EH <=0xC > - > - Kabylake 06_9EH <=0xD > + Kabylake_L 06_8EH <= 0xC > + Kabylake 06_9EH <= 0xD > ============= ============ ======== > > Related CVEs > -- > 2.21.1 looks good to me. --mark