From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 22 Oct 2019 04:10:43 -0000 Received: from us-smtp-delivery-1.mimecast.com ([207.211.31.120] helo=us-smtp-1.mimecast.com) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1iMlVI-0007wQ-Bx for speck@linutronix.de; Tue, 22 Oct 2019 06:10:42 +0200 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 05EDA47B for ; Tue, 22 Oct 2019 04:10:34 +0000 (UTC) Received: from tonnant.bos.jonmasters.org (ovpn-125-30.rdu2.redhat.com [10.10.125.30]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 719EB6012C for ; Tue, 22 Oct 2019 04:10:33 +0000 (UTC) References: =?utf-8?q?=3C188a762ef941a866da7ac597981b3a425e0f7e70=2E1571688957=2Egi?= =?utf-8?q?t=2Epawan=2Ekumar=2Egupta=40linux=2Eintel=2Ecom=3E?= From: Jon Masters Message-ID: <4f718d5b-b578-ddd9-9898-36c6088a4615@redhat.com> Date: Tue, 22 Oct 2019 00:10:31 -0400 MIME-Version: 1.0 In-Reply-To: =?utf-8?q?=3C188a762ef941a866da7ac597981b3a425e0f7e70=2E15716?= =?utf-8?q?88957=2Egit=2Epawan=2Ekumar=2Egupta=40linux=2Eintel=2Ecom=3E?= Subject: [MODERATED] ... Content-Type: multipart/mixed; boundary="zPvSl3XKXnTFIbIfl2Q1HJPvuxEKZ5VBx"; protected-headers="v1" To: speck@linutronix.de List-ID: This is an OpenPGP/MIME encrypted message (RFC 4880 and 3156) --zPvSl3XKXnTFIbIfl2Q1HJPvuxEKZ5VBx Content-Type: text/rfc822-headers; protected-headers="v1" Content-Disposition: inline Subject: Re: [PATCH v7 07/10] TAAv7 7 --zPvSl3XKXnTFIbIfl2Q1HJPvuxEKZ5VBx Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 10/21/19 4:29 PM, speck for Pawan Gupta wrote: > From: Pawan Gupta > Subject: [PATCH v7 07/10] x86/tsx: Add "auto" option to TSX cmdline par= ameter >=20 > Platforms which are not affected by X86_BUG_TAA may want the TSX featur= e > enabled. Add "auto" option to the TSX cmdline parameter. When tsx=3Daut= o > disable TSX when X86_BUG_TAA is present, otherwise enable TSX. Earlier, you do this: + if (!(ia32_cap & ARCH_CAP_TAA_NO) && + (boot_cpu_has(X86_FEATURE_RTM) || + (ia32_cap & ARCH_CAP_TSX_CTRL_MSR))) + setup_force_cpu_bug(X86_BUG_TAA); Per the other discussion, I think you want to double check if tsx=3Dauto is doing what folks want it to do, because currently I think auto still has the semantics of turning off TSX on everything, rather than just those cases where a VERW mitigation won't suffice/is in use. (see Thomas's update to the "Re: [PATCH v5 08/11] TAAv5 8" diagram) It seems that it's a good time to double check if that's what everyone on the distro side is expecting, namely "tsx=3Dauto will disable TSX automatically on those parts impacted by TAA for which VERW mitigation is not available". This seems to reduce the set where we end up disabling TSX essentially to a few very recent processors (e.g. CascadeLake some second gen, Bx stepping?). If that's what we are all expecting/are planning to do, I suspect Red Hat would go with tsx=3Dauto as a default since the set of impacted processors can be documented. Anyway, auto isn't right yet. Jon. --=20 Computer Architect | Sent with my Fedora powered laptop --zPvSl3XKXnTFIbIfl2Q1HJPvuxEKZ5VBx--