From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 09 Oct 2019 23:01:31 -0000 Received: from shadbolt.e.decadent.org.uk ([88.96.1.126]) by Galois.linutronix.de with esmtps (TLS1.2:RSA_AES_256_CBC_SHA1:256) (Exim 4.80) (envelope-from ) id 1iIKxU-0003H4-V5 for speck@linutronix.de; Thu, 10 Oct 2019 01:01:29 +0200 Received: from [192.168.4.242] (helo=deadeye) by shadbolt.decadent.org.uk with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1iIKxU-0004Dv-3n for speck@linutronix.de; Thu, 10 Oct 2019 00:01:28 +0100 Received: from ben by deadeye with local (Exim 4.92.2) (envelope-from ) id 1iIKxT-0000Y5-TI for speck@linutronix.de; Thu, 10 Oct 2019 00:01:27 +0100 Message-ID: <88ac4542fa0f8d71d0ff672cc4693dcaec73db74.camel@decadent.org.uk> Subject: [MODERATED] Re: [PATCH v5 1/8] NX 1 From: Ben Hutchings Date: Thu, 10 Oct 2019 00:01:21 +0100 In-Reply-To: <1561989149-17323-2-git-send-email-pbonzini@redhat.com> References: <1561989149-17323-1-git-send-email-pbonzini@redhat.com> <1561989149-17323-2-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg="pgp-sha512"; protocol="application/pgp-signature"; boundary="=-4bNgHkw8zd3ljaO4A7xm" To: speck@linutronix.de List-ID: --=-4bNgHkw8zd3ljaO4A7xm Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2019-07-01 at 15:52 +0200, speck for Paolo Bonzini wrote: > From: Pawan Gupta > Subject: [PATCH 1/8] x86: Add ITLB_MULTIHIT bug infrastructure [...] > --- a/arch/x86/include/asm/cpufeatures.h > +++ b/arch/x86/include/asm/cpufeatures.h > @@ -385,5 +385,6 @@ > #define X86_BUG_L1TF X86_BUG(18) /* CPU is affected by L1 Terminal Fau= lt */ > #define X86_BUG_MDS X86_BUG(19) /* CPU is affected by Microarchitectur= al data sampling */ > #define X86_BUG_MSBDS_ONLY X86_BUG(20) /* CPU is only affected by the = MSDBS variant of BUG_MDS */ > +#define X86_BUG_ITLB_MULTIHIT X86_BUG(21) /* CPU may incur MCE during c= ertain page attribute changes */ [...] So this is now going to need to be renumbered after X86_BUG_SWAPGS.=20 But the TAA series also allocates the next bug flag here. Then in other places there are textual conflicts between the two series due to insertions in the same place. I believe both of the issues these are addressing have the same embargo date, so it would be helpful to backporters if you could decide which fix belongs first, even if they continue to be developed as separate branches for now. (So far I've found it easier to apply NX before TAA.) Ben. --=20 Ben Hutchings Humans are not rational beings; they are rationalising beings. --=-4bNgHkw8zd3ljaO4A7xm Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEErCspvTSmr92z9o8157/I7JWGEQkFAl2eZsIACgkQ57/I7JWG EQkUxQ/9GnExweSKVQrFWEOL65UcjO4F94YV/G/9gKRJXFlKAP7EYFwuaJI/BQCy r6L4cjqN5kLQ6X6G5Fi1DSohwMOUo0xcf/T28V+qq5I8vDrRevNWp716ZHXDwHqP +EdefHonArBo4aGylhyzufK6S/5brm+iArLK01p6n3MngqrnH9LiUvrItV84YB6W eb9b4Ufd+o+dWDal9O/7kKurUEx4My72JNxdtwbjBjNj63aaajCgje3lFllS29Ce 1As+zzAQhvrggFWb7Q2ymWkENw54nF9B0PnwQpOLcNwzS1863mmD1VbqJuHoSlK4 z0wFLvjEevv5KtwVX5j+pSBfbhgKbABSOwXvfzTVNrjOSvXMJelGkpmn2XkjfxuZ cct1tsxsmjJYWm/YGZANn1JKoxKfOiANR0ObAQ8SbJz+AlqHHCCCTVIb8PgI1FtQ L5jYJqE/ehFAphcM4J1FlRTrAUPRXuceuQymrd1iglXSVZ1FNf/H/NY6tm1IfOQ1 c2KOMflxWdDk6TDigIaG6+n5PGVWEE5zMpfamF4PsLAqeFacp8g7aJZSNF9qrL1e Uxanz7CwOTb6GAT+m9TfiIa8e5Wgr20dvhprPVvIMpFddERFCTpArQ909rrjyO6u LSE3F0hnYT3NNrvKteHXQkhEvV1mDPoG6GDVY4wnDJX56B7NrI8= =OBRA -----END PGP SIGNATURE----- --=-4bNgHkw8zd3ljaO4A7xm--