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From: Ben Hutchings <ben@decadent.org.uk>
To: speck@linutronix.de
Subject: [MODERATED] Re: [PATCH 2/2] more sampling fun 2
Date: Thu, 20 Feb 2020 19:06:46 +0000	[thread overview]
Message-ID: <9ff51a370c09d7a1a32fe9b0748e91d72f0348ff.camel@decadent.org.uk> (raw)
In-Reply-To: <c5bae80efe4694c81d9cbbce633a2228086a330c.158215=?utf-8?q?2322?= .git.mgross@linux.intel.com>

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On Thu, 2020-01-16 at 14:16 -0800, speck for mark gross wrote:
[...]
> --- a/arch/x86/kernel/cpu/bugs.c
> +++ b/arch/x86/kernel/cpu/bugs.c
[...]
> +void srbds_configure_mitigation(void)
> +{
> +	u64 mcu_ctrl;
> +
> +	if (!boot_cpu_has_bug(X86_BUG_SRBDS) && !boot_cpu_has_bug(X86_BUG_SRBDS_TSX))
> +		return;
> +
> +	if (!boot_cpu_has(X86_FEATURE_SRBDS_CTRL))
> +		return;
> +
> +	rdmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);
> +	if (srbds_mitigation == SRBDS_MITIGATION_FULL)
> +		mcu_ctrl &= ~SRBDS_MITG_DIS;
> +	else if (srbds_mitigation == SRBDS_MITIGATION_OFF)
> +		mcu_ctrl |= SRBDS_MITG_DIS;
> +
> +	if (boot_cpu_has_bug(X86_BUG_SRBDS_TSX) && !boot_cpu_has(X86_FEATURE_RTM))
> +		mcu_ctrl |= SRBDS_MITG_DIS;

In this case we will incorrectly report "Mitigation: bus lock when
using RDRAND or RDSEED" whereas the actual mitigation is that TSX is
disabled.

> +	wrmsrl(MSR_IA32_MCU_OPT_CTRL, mcu_ctrl);
> +}
[...]
> --- a/arch/x86/kernel/cpu/common.c
> +++ b/arch/x86/kernel/cpu/common.c
[...] 
> @@ -1042,6 +1047,19 @@ static const struct x86_cpu_id_ext cpu_vuln_whitelist[] __initconst = {
>  
>  	VULNWL_INTEL(CORE_YONAH,		NO_SSB),
>  
> +	VULNWL_INTEL(IVYBRIDGE,		SRBDS), /*06_3A*/
> +	VULNWL_INTEL(HASWELL,		SRBDS), /*06_3C*/
> +	VULNWL_INTEL(HASWELL_L,		SRBDS), /*06_45*/
> +	VULNWL_INTEL(HASWELL_G,		SRBDS), /*06_46*/
> +	VULNWL_INTEL(BROADWELL_G,	SRBDS), /*06_47*/
> +	VULNWL_INTEL(BROADWELL,		SRBDS), /*06_3D*/
> +	VULNWL_INTEL(SKYLAKE_L,		SRBDS), /*06_4E*/
> +	VULNWL_INTEL(SKYLAKE,		SRBDS), /*06_5E*/
> +	VULNWL_INTEL_STEPPING(KABYLAKE_L, (BIT(0xA)-1),		SRBDS), /*06_8E steppings <=A*/

But this matches steppings 0-9.

> +	VULNWL_INTEL_STEPPING(KABYLAKE_L, BIT(0xB)|BIT(0xC),	SRBDS_TSX), /*06_8E stepping = 0xB if TSX enabled*/
> +	VULNWL_INTEL_STEPPING(KABYLAKE, (BIT(0xB)-1),		SRBDS), /*06_9E steppings <=B*/

And this matches steppings 0-A.

> +	VULNWL_INTEL_STEPPING(KABYLAKE, BIT(0xC)|BIT(0xD),	SRBDS_TSX), /*06_9E stepping = 0xC if TSX enabled*/
[...]

You should write the bit masks using GENMASK() instead of BIT().

Ben.
 
-- 
Ben Hutchings
Unix is many things to many people,
but it's never been everything to anybody.


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       reply	other threads:[~2020-02-20 19:06 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <c5bae80efe4694c81d9cbbce633a2228086a330c.158215=?utf-8?q?2322?= .git.mgross@linux.intel.com>
2020-02-20 19:06 ` Ben Hutchings [this message]
2020-02-20 19:35   ` mark gross
2020-02-21 22:25     ` mark gross
2020-02-24 17:31 Konrad Rzeszutek Wilk
2020-02-24 18:17 ` [MODERATED] " Borislav Petkov
2020-02-24 21:39   ` mark gross
2020-02-24 23:10     ` [MODERATED] " Borislav Petkov
2020-02-25  1:26       ` Josh Poimboeuf
2020-02-25 10:46         ` Borislav Petkov
2020-02-25 14:18           ` Josh Poimboeuf
2020-02-25 14:23             ` Jiri Kosina
2020-02-25 14:44               ` Josh Poimboeuf
2020-02-25 14:59             ` Borislav Petkov
2020-02-26 20:20               ` Josh Poimboeuf
2020-02-26 21:16                 ` Thomas Gleixner
2020-02-26 22:19                   ` [MODERATED] " Konrad Rzeszutek Wilk

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