On Wed, 6 Mar 2019, speck for Andrew Cooper wrote:
> On 01/03/2019 21:47, speck for Thomas Gleixner wrote:
> >  #define VULNWL(_vendor, _family, _model, _whitelist)	\
> >  	{ X86_VENDOR_##_vendor, _family, _model, X86_FEATURE_ANY, _whitelist }
> > @@ -983,8 +984,8 @@ static const __initconst struct x86_cpu_
> >  	VULNWL_INTEL(ATOM_SILVERMONT_X,		NO_SSB | NO_L1TF),
> >  	VULNWL_INTEL(ATOM_SILVERMONT_MID,	NO_SSB | NO_L1TF),
> >  	VULNWL_INTEL(ATOM_AIRMONT,		NO_SSB | NO_L1TF),
> > -	VULNWL_INTEL(XEON_PHI_KNL,		NO_SSB | NO_L1TF),
> > -	VULNWL_INTEL(XEON_PHI_KNM,		NO_SSB | NO_L1TF),
> > +	VULNWL_INTEL(XEON_PHI_KNL,		NO_SSB | NO_L1TF | MSBDS_ONLY),
> > +	VULNWL_INTEL(XEON_PHI_KNM,		NO_SSB | NO_L1TF | MSBDS_ONLY),
> 
> Looking at the table in the magic PDF, Silvermont/Airmont are MDBDS_ONLY
> as well.
> 
> The model numbers listed in the Silvermont/Airmont category are 37, 4a,
> 4c, 4d, 5a, 5d, 6e, 65, 75.
> 
> The first 5 of those models match up with Linux's Silvermont/Airmont
> names, while the last 4 are unknown.  I can't locate them anywhere and
> have requested clarification.

Yeah, forgot about the Silvermonts. Though the SMT problem does not exist
there as these beasts do not have HT AFAICT.

Thanks,

	tglx