From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linutronix.de (193.142.43.55:993) by crypto-ml.lab.linutronix.de with IMAP4-SSL for ; 24 Sep 2019 13:39:29 -0000 Received: from mx2.suse.de ([195.135.220.15] helo=mx1.suse.de) by Galois.linutronix.de with esmtps (TLS1.2:DHE_RSA_AES_256_CBC_SHA256:256) (Exim 4.80) (envelope-from ) id 1iCl2N-0001iC-Kp for speck@linutronix.de; Tue, 24 Sep 2019 15:39:28 +0200 Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 37D48AEAF for ; Tue, 24 Sep 2019 13:39:22 +0000 (UTC) Date: Tue, 24 Sep 2019 15:38:59 +0200 (CEST) From: Jiri Kosina Subject: [MODERATED] Re: [PATCH v4 04/10] TAAv4 4 In-Reply-To: <20190924133151.GC618537@kroah.com> Message-ID: References: <20190904060028.GD7212@kroah.com> <20190906072835.GD13480@guptapadev.amr> <20190906092727.GA16843@kroah.com> <20190910184223.GA7543@guptapadev.amr> <20190910223334.GA21301@kroah.com> <20190911023223.GA8305@guptapadev.amr> <20190923191312.GB161280@kroah.com> <20190923222553.GA2473@guptapadev.amr> <20190924050459.GA3705@kroah.com> <20190924133151.GC618537@kroah.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit To: speck@linutronix.de List-ID: On Tue, 24 Sep 2019, speck for Greg KH wrote: > > FWIW there are other processors that support transactional memory (e.g > > powerpc), but it's not called TSX; that's Intel specific. > > What does powerpc call it, Hardware Trasnactional Memory (HTM). > and do they export the "turn it on or off" attribute anywhere? I think you can only do that using 'ppc_tm' kernel cmdline parameter during boot. -- Jiri Kosina SUSE Labs