From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5625428FA; Thu, 8 Sep 2022 14:51:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F4026C433D7; Thu, 8 Sep 2022 14:51:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1662648693; bh=w/NqRVcvSVbY8x3edIIhJ+5pecP8W7Yh1phAyoL+i9E=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=uTGAmwcFdest81NHp1IQeYY8ldKRgc5pzomlhl2M843Vy3CFCWqzPG9+GJ97sqsZE iyDXIW5HwMLQxx1qccMjUe5xYv0KE8qnf70elwig63ySLkXBbCZ8N2AGsPUTCfllsC jFj0RNBvp0Fx94z16R9dPZ/ltf/8XEiraRNk482KzSxjr1N5MtxyvH3l7suDvuouOM BVby9dLPlNdNiM6Kt4YwEOPxsa3VoNBh7C3Bpbfwpny1+Ppj7caDUC860YtDpsWatT J/Zb3C6xUKIWwDHUDd2V/WW45v+UFKr+TUaRcSGnbByPsRCeFwhwm+QE+Iuwemgy9r 8ZxlFkCb+CNtQ== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1oWIsM-008wif-NR; Thu, 08 Sep 2022 15:51:30 +0100 Date: Thu, 08 Sep 2022 15:51:30 +0100 Message-ID: <877d2dvs0d.wl-maz@kernel.org> From: Marc Zyngier To: Frank Li Cc: "tglx@linutronix.de" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "shawnguo@kernel.org" , "s.hauer@pengutronix.de" , "kw@linux.com" , "bhelgaas@google.com" , "linux-kernel@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "linux-pci@vger.kernel.org" , Peng Fan , Aisheng Dong , "jdmason@kudzu.us" , "kernel@pengutronix.de" , "festevam@gmail.com" , dl-linux-imx , "kishon@ti.com" , "lorenzo.pieralisi@arm.com" , "ntb@lists.linux.dev" , "lznuaa@gmail.com" , "imx@lists.linux.dev" , "manivannan.sadhasivam@linaro.org" Subject: Re: [EXT] Re: [PATCH v9 2/4] irqchip: Add IMX MU MSI controller driver In-Reply-To: References: <20220907034856.3101570-1-Frank.Li@nxp.com> <20220907034856.3101570-3-Frank.Li@nxp.com> <87fsh2qpq4.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: frank.li@nxp.com, tglx@linutronix.de, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kw@linux.com, bhelgaas@google.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, peng.fan@nxp.com, aisheng.dong@nxp.com, jdmason@kudzu.us, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com, ntb@lists.linux.dev, lznuaa@gmail.com, imx@lists.linux.dev, manivannan.sadhasivam@linaro.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false On Thu, 08 Sep 2022 15:23:53 +0100, Frank Li wrote: > > > > > On Wed, 07 Sep 2022 04:48:54 +0100, > > Frank Li wrote: > > > > > > The MU block found in a number of Freescale/NXP SoCs supports > > generating > > > IRQs by writing data to a register > > > > > > This enables the MU block to be used as a MSI controller, by leveraging > > > the platform-MSI API > > > > Missing full stop after each sentence. > > [Frank Li] Do you means missed "."? Yes. > > > diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig > > > index 5e4e50122777d..e04c6521dce55 100644 > > > --- a/drivers/irqchip/Kconfig > > > +++ b/drivers/irqchip/Kconfig > > > @@ -470,6 +470,15 @@ config IMX_INTMUX > > > help > > > Support for the i.MX INTMUX interrupt multiplexer. > > > > > > +config IMX_MU_MSI > > > + bool "i.MX MU work as MSI controller" > > > > Why bool? Doesn't it also work as a module? > > [Frank Li] I remember you said that irq-chip can't be removed. > So I am not sure why need build as module. Not being removed doesn't mean it cannot be built as a module and loaded on demand. Why should I be forced to have this driver built-in if my kernel is used on a variety of systems, only one of them having this device? > > > + > > > +struct imx_mu_msi { > > > + spinlock_t lock; > > > + raw_spinlock_t reglock; > > > > Why two locks? Isn't one enough to protect both MSI allocation (which > > happens once in a blue moon) and register access? > > [Frank Li] Previously your comment, ask me to use raw_spinlock for > read\write register access. I don't think raw_spinlock is good for > MSI allocation. Why wouldn't it be good enough? I'd really like to know. > > > > > Also, where are these locks initialised? > > > > [Frank Li] struct imx_mu_msi is fill zero when allocated. > Does it still need additional initialization for spinlock? Have you heard of lockdep? Or CONFIG_DEBUG_SPINLOCK? Maybe you should try it. > > > + if (!pdev) > > > + return -ENODEV; > > > > How can that happen? > > > [Frank Li] Not sure, many driver check as it. And? Just because someone does something pointless, you have to imitate them? M. -- Without deviation from the norm, progress is not possible.