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* I2C_IMX support for i.MX8MP
@ 2022-08-17 10:38 Richard Leitner
  2022-08-17 14:01 ` [EXT] " Shenwei Wang
  0 siblings, 1 reply; 10+ messages in thread
From: Richard Leitner @ 2022-08-17 10:38 UTC (permalink / raw)
  To: imx

Hi list,

Just found out about this imx ML and I'm not sure if it is also intended
for questions, but I'll give it a try. Please correct me if I'm wrong.

We are currently in the process of creating a BSP for a custom i.MX8MP
based board which features 3 I2C busses. Unfortunately I'm currently
unable to get them to live with the i2c-imx or i2c-imxlpi2c drivers.
Using i2c-gpio (with adapted SW_MUX_CTL and unchanged SW_PAD_CTL)
works fine.

I'm aware of ERR007805 and tried therefore to configure the busses to
200kHz, but I don't get any signals/edges on the pins.

So the basic question for me is (as I was unable to find any trustworthy
answers on the net) if the i2c-imx driver supports the i.MX8MP at all?

Any feedback is warmly welcome!

regards;rl

P.S. All tests were done with mainline linux 5.19.y.

P.P.S I've also sent this mail to linux-imx@nxp.com before.

^ permalink raw reply	[flat|nested] 10+ messages in thread

* RE: [EXT] I2C_IMX support for i.MX8MP
  2022-08-17 10:38 I2C_IMX support for i.MX8MP Richard Leitner
@ 2022-08-17 14:01 ` Shenwei Wang
  2022-08-17 14:07   ` Richard Leitner
  0 siblings, 1 reply; 10+ messages in thread
From: Shenwei Wang @ 2022-08-17 14:01 UTC (permalink / raw)
  To: Richard Leitner, imx

Hello Richard,

This is not an ML for imx product support. It is for i.MX related Linux development for upstreaming.

Regards
Shenwei

> -----Original Message-----
> From: Richard Leitner <richard.leitner@linux.dev>
> Sent: Wednesday, August 17, 2022 5:39 AM
> To: imx@lists.linux.dev
> Subject: [EXT] I2C_IMX support for i.MX8MP
> 
> Caution: EXT Email
> 
> Hi list,
> 
> Just found out about this imx ML and I'm not sure if it is also intended for
> questions, but I'll give it a try. Please correct me if I'm wrong.
> 
> We are currently in the process of creating a BSP for a custom i.MX8MP based
> board which features 3 I2C busses. Unfortunately I'm currently unable to get
> them to live with the i2c-imx or i2c-imxlpi2c drivers.
> Using i2c-gpio (with adapted SW_MUX_CTL and unchanged SW_PAD_CTL)
> works fine.
> 
> I'm aware of ERR007805 and tried therefore to configure the busses to 200kHz,
> but I don't get any signals/edges on the pins.
> 
> So the basic question for me is (as I was unable to find any trustworthy answers
> on the net) if the i2c-imx driver supports the i.MX8MP at all?
> 
> Any feedback is warmly welcome!
> 
> regards;rl
> 
> P.S. All tests were done with mainline linux 5.19.y.
> 
> P.P.S I've also sent this mail to linux-imx@nxp.com before.


^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [EXT] I2C_IMX support for i.MX8MP
  2022-08-17 14:01 ` [EXT] " Shenwei Wang
@ 2022-08-17 14:07   ` Richard Leitner
  2022-08-17 14:14     ` Shenwei Wang
  0 siblings, 1 reply; 10+ messages in thread
From: Richard Leitner @ 2022-08-17 14:07 UTC (permalink / raw)
  To: Shenwei Wang; +Cc: imx

On Wed, Aug 17, 2022 at 02:01:00PM +0000, Shenwei Wang wrote:
> Hello Richard,
> 
> This is not an ML for imx product support. It is for i.MX related Linux development for upstreaming.

Thanks for the information and sorry for the obviously inappropriate support request.

May I then ask the question differently?

Is i2c-imx supposed to support i.MX8MP on current mainline?

If yes: Great! I'll take a deeper look into my setup, I guess I've done
something wrong then...

If not: Are you aware of anybody working on it already?

regards;rl

> 
> Regards
> Shenwei
> 

^ permalink raw reply	[flat|nested] 10+ messages in thread

* RE: [EXT] I2C_IMX support for i.MX8MP
  2022-08-17 14:07   ` Richard Leitner
@ 2022-08-17 14:14     ` Shenwei Wang
  2022-08-18  6:55       ` Richard Leitner
  2022-08-18  8:40       ` Richard Leitner
  0 siblings, 2 replies; 10+ messages in thread
From: Shenwei Wang @ 2022-08-17 14:14 UTC (permalink / raw)
  To: Richard Leitner; +Cc: imx



> -----Original Message-----
> From: Richard Leitner <richard.leitner@linux.dev>
> Sent: Wednesday, August 17, 2022 9:07 AM
> To: Shenwei Wang <shenwei.wang@nxp.com>
> Cc: imx@lists.linux.dev
> Subject: Re: [EXT] I2C_IMX support for i.MX8MP
> 
> Caution: EXT Email
> 
> On Wed, Aug 17, 2022 at 02:01:00PM +0000, Shenwei Wang wrote:
> > Hello Richard,
> >
> > This is not an ML for imx product support. It is for i.MX related Linux
> development for upstreaming.
> 
> Thanks for the information and sorry for the obviously inappropriate support
> request.
> 
> May I then ask the question differently?
> 
> Is i2c-imx supposed to support i.MX8MP on current mainline?
> 
> If yes: Great! I'll take a deeper look into my setup, I guess I've done something
> wrong then...
> 
> If not: Are you aware of anybody working on it already?

The support for imx8mp-evk board has already pushed to mainline. That includes the usage of i2c-imx.
For example, a GPIO expander is connected to I2C3 on evk board.

Regards,
Shenwei

> 
> regards;rl
> 
> >
> > Regards
> > Shenwei
> >

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [EXT] I2C_IMX support for i.MX8MP
  2022-08-17 14:14     ` Shenwei Wang
@ 2022-08-18  6:55       ` Richard Leitner
  2022-08-18  8:40       ` Richard Leitner
  1 sibling, 0 replies; 10+ messages in thread
From: Richard Leitner @ 2022-08-18  6:55 UTC (permalink / raw)
  To: Shenwei Wang; +Cc: imx

On Wed, Aug 17, 2022 at 02:14:53PM +0000, Shenwei Wang wrote:
> > 
> > Caution: EXT Email
> > 
> > On Wed, Aug 17, 2022 at 02:01:00PM +0000, Shenwei Wang wrote:
> > 
> > Is i2c-imx supposed to support i.MX8MP on current mainline?
> > 
> > If yes: Great! I'll take a deeper look into my setup, I guess I've done something
> > wrong then...
> > 
> > If not: Are you aware of anybody working on it already?
> 
> The support for imx8mp-evk board has already pushed to mainline. That includes the usage of i2c-imx.
> For example, a GPIO expander is connected to I2C3 on evk board.

Thanks! I didn't thought of the EVK.

regards;rl

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [EXT] I2C_IMX support for i.MX8MP
  2022-08-17 14:14     ` Shenwei Wang
  2022-08-18  6:55       ` Richard Leitner
@ 2022-08-18  8:40       ` Richard Leitner
  2022-08-18 11:59         ` Shenwei Wang
  1 sibling, 1 reply; 10+ messages in thread
From: Richard Leitner @ 2022-08-18  8:40 UTC (permalink / raw)
  To: Shenwei Wang; +Cc: imx

On Wed, Aug 17, 2022 at 02:14:53PM +0000, Shenwei Wang wrote:
> 
> The support for imx8mp-evk board has already pushed to mainline. That includes the usage of i2c-imx.
> For example, a GPIO expander is connected to I2C3 on evk board.

Thanks again. It now works with linux v6.0-rc1.

The missing piece was setting the 0x40000000 bit in the SW_PAD_CTL
registers of SCL and SDA.
Unfortunately this bit seems to be undocumented in the RefManual and
also the driver documentation doesn't state anything about it.

Can you please shed some light in this "magic" bit? Would be really
helpful, thanks!

Furthermore I guess documenting it somewhere in the driver or setting it
implicitely (if that's possible) would be a good idea?

regards;rl

^ permalink raw reply	[flat|nested] 10+ messages in thread

* RE: [EXT] I2C_IMX support for i.MX8MP
  2022-08-18  8:40       ` Richard Leitner
@ 2022-08-18 11:59         ` Shenwei Wang
  2022-08-18 12:54           ` David Wolfson
  0 siblings, 1 reply; 10+ messages in thread
From: Shenwei Wang @ 2022-08-18 11:59 UTC (permalink / raw)
  To: Richard Leitner; +Cc: imx

Hi Richard,

Nothing is hidden here. That is PAD control register, and should be documented in the IOMUXC and PIN Control section in the RM.

Regards,
Shenwei

> -----Original Message-----
> From: Richard Leitner <richard.leitner@linux.dev>
> Sent: Thursday, August 18, 2022 3:41 AM
> To: Shenwei Wang <shenwei.wang@nxp.com>
> Cc: imx@lists.linux.dev
> Subject: Re: [EXT] I2C_IMX support for i.MX8MP
> 
> Caution: EXT Email
> 
> On Wed, Aug 17, 2022 at 02:14:53PM +0000, Shenwei Wang wrote:
> >
> > The support for imx8mp-evk board has already pushed to mainline. That
> includes the usage of i2c-imx.
> > For example, a GPIO expander is connected to I2C3 on evk board.
> 
> Thanks again. It now works with linux v6.0-rc1.
> 
> The missing piece was setting the 0x40000000 bit in the SW_PAD_CTL registers
> of SCL and SDA.
> Unfortunately this bit seems to be undocumented in the RefManual and also the
> driver documentation doesn't state anything about it.
> 
> Can you please shed some light in this "magic" bit? Would be really helpful,
> thanks!
> 
> Furthermore I guess documenting it somewhere in the driver or setting it
> implicitely (if that's possible) would be a good idea?
> 
> regards;rl

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [EXT] I2C_IMX support for i.MX8MP
  2022-08-18 11:59         ` Shenwei Wang
@ 2022-08-18 12:54           ` David Wolfson
  2022-08-18 13:47             ` Richard Leitner
  0 siblings, 1 reply; 10+ messages in thread
From: David Wolfson @ 2022-08-18 12:54 UTC (permalink / raw)
  To: Shenwei Wang; +Cc: Richard Leitner, imx

On Thu, Aug 18, 2022 at 11:59:41AM +0000, Shenwei Wang wrote:
>Hi Richard,
>
>Nothing is hidden here. That is PAD control register, and should be documented in the IOMUXC and PIN Control section in the RM.
>

Checking the IOMUX and PADs' settings is the first step when enabling
an interface.

David

>Regards,
>Shenwei
>
>> -----Original Message-----
>> From: Richard Leitner <richard.leitner@linux.dev>
>> Sent: Thursday, August 18, 2022 3:41 AM
>> To: Shenwei Wang <shenwei.wang@nxp.com>
>> Cc: imx@lists.linux.dev
>> Subject: Re: [EXT] I2C_IMX support for i.MX8MP
>>
>> Caution: EXT Email
>>
>> On Wed, Aug 17, 2022 at 02:14:53PM +0000, Shenwei Wang wrote:
>> >
>> > The support for imx8mp-evk board has already pushed to mainline. That
>> includes the usage of i2c-imx.
>> > For example, a GPIO expander is connected to I2C3 on evk board.
>>
>> Thanks again. It now works with linux v6.0-rc1.
>>
>> The missing piece was setting the 0x40000000 bit in the SW_PAD_CTL registers
>> of SCL and SDA.
>> Unfortunately this bit seems to be undocumented in the RefManual and also the
>> driver documentation doesn't state anything about it.
>>
>> Can you please shed some light in this "magic" bit? Would be really helpful,
>> thanks!
>>
>> Furthermore I guess documenting it somewhere in the driver or setting it
>> implicitely (if that's possible) would be a good idea?
>>
>> regards;rl

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [EXT] I2C_IMX support for i.MX8MP
  2022-08-18 12:54           ` David Wolfson
@ 2022-08-18 13:47             ` Richard Leitner
  2022-08-29  7:00               ` Richard Leitner
  0 siblings, 1 reply; 10+ messages in thread
From: Richard Leitner @ 2022-08-18 13:47 UTC (permalink / raw)
  To: David Wolfson; +Cc: Shenwei Wang, imx

On Thu, Aug 18, 2022 at 07:54:04AM -0500, David Wolfson wrote:
> On Thu, Aug 18, 2022 at 11:59:41AM +0000, Shenwei Wang wrote:
> > Hi Richard,
> > 
> > Nothing is hidden here. That is PAD control register, and should be documented in the IOMUXC and PIN Control section in the RM.
> > 
> 
> Checking the IOMUX and PADs' settings is the first step when enabling
> an interface.

Sure, that's what I've done. Nonetheless the "8.2.4.280
SW_PAD_CTL_PAD_I2C3_SCL SW PAD Control Register
(IOMUXC_SW_PAD_CTL_PAD_I2C3_SCL)" section in the IMX8MPRM says bit 30 is
reserved.

So does "8.2.4.128 SW_MUX_CTL_PAD_I2C3_SCL SW MUX Control Register
(IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL)".

Maybe I'm just too dumb do find it... So it would be really helpful if
you could please give a pointer where to find that documentation?

Thanks & regards;rl

> 
> David
> 

^ permalink raw reply	[flat|nested] 10+ messages in thread

* Re: [EXT] I2C_IMX support for i.MX8MP
  2022-08-18 13:47             ` Richard Leitner
@ 2022-08-29  7:00               ` Richard Leitner
  0 siblings, 0 replies; 10+ messages in thread
From: Richard Leitner @ 2022-08-29  7:00 UTC (permalink / raw)
  To: Shenwei Wang, David Wolfson; +Cc: imx

Hi Shenwei, Hi David,

friendly ping.

On Thu, Aug 18, 2022 at 03:47:23PM +0200, Richard Leitner wrote:
> On Thu, Aug 18, 2022 at 07:54:04AM -0500, David Wolfson wrote:
> > On Thu, Aug 18, 2022 at 11:59:41AM +0000, Shenwei Wang wrote:
> > > Hi Richard,
> > > 
> > > Nothing is hidden here. That is PAD control register, and should be documented in the IOMUXC and PIN Control section in the RM.
> > > 
> > 
> > Checking the IOMUX and PADs' settings is the first step when enabling
> > an interface.
> 
> Sure, that's what I've done. Nonetheless the "8.2.4.280
> SW_PAD_CTL_PAD_I2C3_SCL SW PAD Control Register
> (IOMUXC_SW_PAD_CTL_PAD_I2C3_SCL)" section in the IMX8MPRM says bit 30 is
> reserved.
> 
> So does "8.2.4.128 SW_MUX_CTL_PAD_I2C3_SCL SW MUX Control Register
> (IOMUXC_SW_MUX_CTL_PAD_I2C3_SCL)".
> 
> Maybe I'm just too dumb do find it... So it would be really helpful if
> you could please give a pointer where to find that documentation?

Any hints on where to find the documentation of that bit?

Thanks & regards;rl

^ permalink raw reply	[flat|nested] 10+ messages in thread

end of thread, other threads:[~2022-08-29  7:07 UTC | newest]

Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-08-17 10:38 I2C_IMX support for i.MX8MP Richard Leitner
2022-08-17 14:01 ` [EXT] " Shenwei Wang
2022-08-17 14:07   ` Richard Leitner
2022-08-17 14:14     ` Shenwei Wang
2022-08-18  6:55       ` Richard Leitner
2022-08-18  8:40       ` Richard Leitner
2022-08-18 11:59         ` Shenwei Wang
2022-08-18 12:54           ` David Wolfson
2022-08-18 13:47             ` Richard Leitner
2022-08-29  7:00               ` Richard Leitner

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