From: Frank Li <Frank.li@nxp.com>
To: Shawn Guo <shawnguo@kernel.org>, robh+dt@kernel.org
Cc: Conor Dooley <conor.dooley@microchip.com>,
alexander.stein@ew.tq-group.com, alexandre.belloni@bootlin.com,
conor+dt@kernel.org, conor.culhane@silvaco.com, conor@kernel.org,
devicetree@vger.kernel.org, festevam@gmail.com,
haibo.chen@nxp.com, imx@lists.linux.dev, joe@perches.com,
kernel@pengutronix.de, krzysztof.kozlowski+dt@linaro.org,
krzysztof.kozlowski@linaro.org,
linux-arm-kernel@lists.infradead.org,
linux-i3c@lists.infradead.org, linux-imx@nxp.com,
linux-kernel@vger.kernel.org, peng.fan@nxp.com, ping.bai@nxp.com,
robh+dt@kernel.org, s.hauer@pengutronix.de, sherry.sun@nxp.com,
xiaoning.wang@nxp.com
Subject: Re: [PATCH v2 2/2] arm64: dts: freescale: imx93: add i3c1 and i3c2
Date: Wed, 6 Dec 2023 11:33:44 -0500 [thread overview]
Message-ID: <ZXCiaKfMYYShoiXK@lizhi-Precision-Tower-5810> (raw)
In-Reply-To: <20231206093106.GE270430@dragon>
On Wed, Dec 06, 2023 at 05:31:06PM +0800, Shawn Guo wrote:
> On Wed, Dec 06, 2023 at 12:46:15AM -0500, Frank Li wrote:
> > On Mon, Nov 27, 2023 at 09:35:39AM +0000, Conor Dooley wrote:
> > > On Mon, Nov 27, 2023 at 10:21:40AM +0800, Shawn Guo wrote:
> > > > On Thu, Nov 09, 2023 at 10:51:13AM -0500, Frank Li wrote:
> > > > > On Tue, Oct 17, 2023 at 03:46:57PM -0400, Frank Li wrote:
> > > > > > Add I3C1 and I3C2.
> > > > > >
> > > > > > Signed-off-by: Frank Li <Frank.Li@nxp.com>
> > > > > > ---
> > > > >
> > > > > @Guo Shawn:
> > > > >
> > > > > Driver part already merged.
> > > > >
> > > > > Please pick up dts part
> > > >
> > > > Rob had a comment [1] about SoC specific compatible. That's not what we
> > > > want?
> > > >
> > > > Shawn
> > > >
> > > > [1] https://lkml.iu.edu/hypermail/linux/kernel/2310.2/03035.html
> > >
> > > Yeah, Rob's request here looks valid to me. Should just be a bindings
> > > change Frank & fall back to the "silvaco,i3c-master-v1" compatible.
> > >
> > > Cheers,
> > > Conor.
> >
> > @shawn:
> > rob agree on "silvaco,i3c-master-v1" compatible.
>
> Hmm, not sure I have seen that. Here is what I saw from Rob:
>
> "
> The real problem here is not whether we have "v1" or not, but you need
> an SoC specific compatible. Unless there's a public spec where we can
> know exactly how many resets, clocks, interrupts, etc.
> "
@Rob:
Previous existed binding doc is "silvaco,i3c-master-v1". So far
this IP in our difference SOC have the same resets and clocks, and only one
interrrupts.
current existed i3c controller compatible string is
snps,dw-i3c-master-1.00a
cdns,i3c-master
mipi-i3c-hci
mipi-i3c-hci is standard. "snps", "cdns" are similar as prefix
"silivaco".
I think the same IP vendor and same IP version should have same
resets, clocks, and interrupts. So far still not met exception yet.
Frank
>
> Shawn
next prev parent reply other threads:[~2023-12-06 16:33 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-17 19:46 [PATCH v2 1/2] i3c: master: svc: fix compatibility string mismatch with binding doc Frank Li
2023-10-17 19:46 ` [PATCH v2 2/2] arm64: dts: freescale: imx93: add i3c1 and i3c2 Frank Li
2023-11-09 15:51 ` Frank Li
2023-11-09 16:51 ` Krzysztof Kozlowski
2023-11-27 2:21 ` Shawn Guo
2023-11-27 9:35 ` Conor Dooley
2023-12-06 5:46 ` Frank Li
2023-12-06 9:31 ` Shawn Guo
2023-12-06 16:33 ` Frank Li [this message]
2023-12-13 8:12 ` Shawn Guo
2023-11-03 19:04 ` [PATCH v2 1/2] i3c: master: svc: fix compatibility string mismatch with binding doc Alexandre Belloni
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