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From: Lyude Paul <lyude@redhat.com>
To: Lee Shawn C <shawn.c.lee@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Cooper Chiou <cooper.chiou@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/mst: filter out the display mode exceed sink's capability
Date: Fri, 24 Apr 2020 16:26:57 -0400	[thread overview]
Message-ID: <078627d6dff5e01868771b5b2158b75446200fd9.camel@redhat.com> (raw)
In-Reply-To: <20200417212408.19649-1-shawn.c.lee@intel.com>

Hi! Sorry this took me a little while to get back to, I had a couple of MST
regressions that I had to look into

On Sat, 2020-04-18 at 05:24 +0800, Lee Shawn C wrote:
> So far, max dot clock rate for MST mode rely on physcial
> bandwidth limitation. It would caused compatibility issue
> if source display resolution exceed MST hub output ability.
> 
> For example, source DUT had DP 1.2 output capability.
> And MST docking just support HDMI 1.4 spec. When a HDMI 2.0
> monitor connected. Source would retrieve EDID from external
> and get max resolution 4k@60fps. DP 1.2 can support 4K@60fps
> because it did not surpass DP physical bandwidth limitation.
> Do modeset to 4k@60fps, source output display data but MST
> docking can't output HDMI properly due to this resolution
> already over HDMI 1.4 spec.
> 
> Refer to commit <fcf463807596> ("drm/dp_mst: Use full_pbn
> instead of available_pbn for bandwidth checks").
> Source driver should refer to full_pbn to evaluate sink
> output capability. And filter out the resolution surpass
> sink output limitation.
> 
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Cooper Chiou <cooper.chiou@intel.com>
> Cc: Lyude Paul <lyude@redhat.com>
> Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 24 ++++++++++++++++++++-
>  1 file changed, 23 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 61605eb8c2af..68697f463dab 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -609,6 +609,26 @@ static int intel_dp_mst_get_modes(struct drm_connector
> *connector)
>  	return intel_dp_mst_get_ddc_modes(connector);
>  }
>  
> +static bool
> +intel_dp_mst_mode_clock_exceed_pbn_bandwidth(struct drm_connector
> *connector, int clock, int bpp)
> +{
> +	struct intel_connector *intel_connector =
> to_intel_connector(connector);
> +	struct intel_dp *intel_dp = intel_connector->mst_port;
> +	struct drm_dp_mst_topology_mgr *mgr = &intel_dp->mst_mgr;
> +	struct drm_dp_mst_port *port = (to_intel_connector(connector))->port;
> +	bool ret = false;
> +
> +	if (!mgr)
> +		return ret;
> +
> +	mutex_lock(&mgr->lock);

This isn't the right lock for this - mgr->lock protects the topology layout
(e.g. drm_dp_mst_port.mstb, drm_dp_mst_port.next, and
drm_dp_mst_branch.ports). port->full_pbn is protected under
&drm_dp_mst_topology_mgr.base.lock (not drm_dp_mst_topology_mgr.lock), so you
need to first add a version of .mode_valid() to struct
drm_connector_helper_funcs that accepts a drm_modeset_acquire_ctx so you can
use that to safely grab &drm_dp_mst_topology_mgr.base.lock.

> +	if (port->full_pbn)

Also - there's no reason to check if (port->full_pbn) here, so long as you're
holding the right locks this should always be populated by the time we create
the drm_connector for the MST port (if it's not, that's a bug that needs to be
fixed).

> +		ret = (drm_dp_calc_pbn_mode(clock, bpp, false) > port-
> >full_pbn);

Finally - I'd say we should probably have a separate patch to add a helper for
calculating the PBN and checking it against port->full_pbn. Maybe something
that looks like this:

int drm_dp_mst_mode_valid(struct drm_dp_mst_port *port, struct
drm_modeset_acquire_ctx *ctx, int clock, int bpp) {
	int ret = MODE_VALID;
	/* TODO: DSC support */

	/* …try grabbing locks here…*/
	if (drm_dp_calc_pbn_mode(clock, bpp, false) > port->full_pbn)
		ret = MODE_CLOCK_HIGH;

	return ret;
}

That way we might be able to add some checks for DSC capable connectors later
once I've migrated most of the DSC code from amdgpu into the MST helpers
> +	mutex_unlock(&mgr->lock);
> +
> +	return ret;
> +}
> +
>  static enum drm_mode_status
>  intel_dp_mst_mode_valid(struct drm_connector *connector,
>  			struct drm_display_mode *mode)
> @@ -631,7 +651,9 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
>  	max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
>  	mode_rate = intel_dp_link_required(mode->clock, 18);
>  
> -	/* TODO - validate mode against available PBN for link */
> +	if (intel_dp_mst_mode_clock_exceed_pbn_bandwidth(connector, mode-
> >clock, 24))
> +		return MODE_CLOCK_HIGH;
> +
>  	if (mode->clock < 10000)
>  		return MODE_CLOCK_LOW;
>  
-- 
Cheers,
	Lyude Paul (she/her)
	Associate Software Engineer at Red Hat

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  parent reply	other threads:[~2020-04-24 20:27 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-17 21:24 [Intel-gfx] [PATCH] drm/i915/mst: filter out the display mode exceed sink's capability Lee Shawn C
2020-04-17 17:58 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for " Patchwork
2020-04-17 18:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-19  3:54 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-04-24 20:26 ` Lyude Paul [this message]
2020-04-30  2:37   ` [Intel-gfx] [PATCH] " Lee, Shawn C
2020-05-07 22:46     ` Lyude Paul
2020-05-11 12:45       ` Ville Syrjälä
2020-05-11  5:09     ` Lee, Shawn C
2020-05-12  6:17       ` Lee, Shawn C
2020-05-12 16:19         ` Lyude Paul
2020-05-11 18:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mst: filter out the display mode exceed sink's capability (rev2) Patchwork
2020-05-11 22:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-05-11 23:19 ` [Intel-gfx] [PATCH v2] drm/i915/mst: filter out the display mode exceed sink's capability Lee Shawn C
2020-05-15 20:53   ` Lyude Paul
2020-05-19  3:56 ` [Intel-gfx] [PATCH v3] " Lee Shawn C
2020-05-22 18:35   ` Lyude Paul
2020-05-22 18:39     ` Lyude Paul
2020-05-25  4:59       ` Lee, Shawn C
2020-05-19  4:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/mst: filter out the display mode exceed sink's capability (rev3) Patchwork
2020-05-19  5:28 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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