From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: Re: [PATCH] drm/i915: Round-up GTT allocations for unfenced surfaces to the next tile row
Date: Sat, 26 Mar 2011 08:52:31 +0000 [thread overview]
Message-ID: <0d30dc$ljoru2@orsmga001.jf.intel.com> (raw)
In-Reply-To: <1301055385-4844-1-git-send-email-chris@chris-wilson.co.uk>
On Fri, 25 Mar 2011 12:16:25 +0000, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> We ensure that an allocated region within the GTT matches the proposed
> usage restrictions. For fenced buffers on old hardware, this means
> rounding up the allocation to the next power of two size and aligning it
> to that size. For unfenced buffers, we need to ensure that the start and
> end of the allocation is aligned to an even tile row.
>
> v2: Apply the allocation fixup to all devices
I verified that it has no substantial impact on performance of gen4+
devices using cairo-gl/xlib. (Since cairo likes to exercise surface
creation and reuse a lot.)
However, I'm not sure if this truly prevents the corruption on i8xx with
2.14.0. Can somebody break out an old machine and test?
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
next prev parent reply other threads:[~2011-03-26 8:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-25 9:36 [PATCH] drm/i915: Round-up GTT allocations for unfenced surfaces to the next tile row Chris Wilson
2011-03-25 12:16 ` Chris Wilson
2011-03-26 8:52 ` Chris Wilson [this message]
2011-03-26 9:20 ` Daniel Vetter
2011-03-26 9:43 ` Chris Wilson
2011-03-26 14:22 ` [PATCH] drm/i915: fix relaxed tiling on gen2 Daniel Vetter
2011-03-26 18:23 ` Chris Wilson
2011-03-26 19:55 ` [PATCH] drm/i915: fix relaxed tiling on gen2 v2 Daniel Vetter
2011-03-26 20:44 ` Chris Wilson
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