From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH] drm/i915: Combine pinning with setting to the display plane Date: Sat, 16 Apr 2011 12:00:21 +0100 Message-ID: <0d30dc$ls875s@orsmga001.jf.intel.com> References: <20110415121123.GA3503@viiv.ffwll.ch> <1302935251-11233-1-git-send-email-chris@chris-wilson.co.uk> <20110416105234.GA3498@viiv.ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 31D7F9E7F4 for ; Sat, 16 Apr 2011 04:00:25 -0700 (PDT) In-Reply-To: <20110416105234.GA3498@viiv.ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Sat, 16 Apr 2011 12:52:35 +0200, Daniel Vetter wrote: > One small comment-nitpick below. > > > diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c > > index 7271956..c73eeaf 100644 > > --- a/drivers/gpu/drm/i915/i915_gem.c > > +++ b/drivers/gpu/drm/i915/i915_gem.c > > @@ -3095,40 +3095,55 @@ int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj, > > } > > > > /* > > - * Prepare buffer for display plane. Use uninterruptible for possible flush > > - * wait, as in modesetting process we're not supposed to be interrupted. > > + * Prepare buffer for display plane (scanout, cursors, etc). > > + * Expects to be called from an uninterruptible phase (modesetting) and allows > > Shouldn't that be "Can be called from uninterruptible ..." Yes, I misphrased. I was thinking along the lines that it should be able to cope with uninterruptible phases but not that it was mandatory. -Chris -- Chris Wilson, Intel Open Source Technology Centre